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PDF UPD4632312A-X Data sheet ( Hoja de datos )

Número de pieza UPD4632312A-X
Descripción 32M-BIT CMOS MOBILE SPECIFIED RAM 2M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION
Fabricantes NEC 
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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4632312A-X
32M-BIT CMOS MOBILE SPECIFIED RAM
2M-WORD BY 16-BIT
EXTENDED TEMPERATURE OPERATION
Description
The µPD4632312A-X is a high speed, low power, 33,554,432 bits (2,097,152 words by 16 bits) CMOS Mobile
Specified RAM featuring Low Power Static RAM compatible function and pin configuration.
The µPD4632312A-X is fabricated with advanced CMOS technology using one-transistor memory cell.
The µPD4632312A-X is packed in 48-pin TAPE FBGA.
Features
2,097,152 words by 16 bits organization
Fast access time: 60, 65, 75, 85 ns (MAX.)
Fast page access time: 18, 25, 30 ns (MAX.)
Byte data control: /LB (I/O0 to I/O7), /UB (I/O8 to I/O15)
Low voltage operation: 2.7 to 3.1 V (-B60X, -B65X)
2.7 to 3.1 V (Chip), 1.65 to 2.1 V (I/O) (-BE75X, -BE85X)
Operating ambient temperature: TA = –25 to +85 °C
Output Enable input for easy application
Chip Enable input: /CS pin
Standby Mode input: MODE pin
Standby Mode1: Normal standby (Memory cell data hold valid)
Standby Mode2: Density of memory cell data hold is variable
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µPD4632312A
Access Operating supply Operating
Supply current
time
voltage
ambient At operating
At standby µA (MAX.)
ns (MAX.) V temperature mA (MAX.)
Density of data hold
Chip
I/O
°C
32M bits 16M bits 8M bits 4M bits 0M bit
-B60X Note, -B65X
60, 65 2.7 to 3.1
–25 to +85
50
100 70 60 50 30
-BE75X Note, -BE85X Note
75, 85 2.7 to 3.1 1.65 to 2.1
45
Note Under development
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with NEC Electronics sales
representative for availability and additional information.
Document No. M15874EJ5V0DS00 (5th edition)
Date Published January 2003 NS CP (K)
Printed in Japan
The mark # shows major revised points.
2001

1 page




UPD4632312A-X pdf
Block Diagram
VCC
VCCQ
GND
A0
A20
I/O0 to I/O7
I/O8 to I/O15
µPD4632312A-X
Standby mode control
Refresh
control
Refresh
counter
Address
buffer
Row
decoder
Input data
controller
Memory cell array
33,554,432 bits
Sense amplifier /
Switching circuit
Column decoder
Address buffer
Output data
controller
/CS
MODE
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/LB
/UB
/WE
/OE
Remark VCCQ is the input / output power supply for -BE75X and -BE85X.
Preliminary Data Sheet M15874EJ5V0DS
5

5 Page





UPD4632312A-X arduino
µPD4632312A-X
3. Page Read Operation
3.1 Features of Page Read Operation
Features
8 Words Mode
Page length
Page read-corresponding addresses
Page read start address
Page direction
Interrupt during page read operation
8 words
A2, A1, A0
Don’t care
Don’t care
Enabled Note
Note An interrupt is output when /CS = H or in case A3 or a higher address changes.
3.2 Page Length
8 words is supported as the page lengths.
3.3 Page-Corresponding Addresses
The page read-enabled addresses are A2, A1, and A0. Fix addresses other than A2, A1, and A0 during page read
operation.
3.4 Page Start Address
Since random page read is supported, any address (A2, A1, A0) can be used as the page read start address.
3.5 Page Direction
Since random page read is possible, there is not restriction on the page direction.
3.6 Interrupt during Page Read Operation
www.DataWShheeent4gUe.ncoemrating an interrupt during page read, either make /CS high level or change A3 and higher addresses.
3.7 When page read is not used
Since random page read is supported, even when not using page read, random access is possible as usual.
Preliminary Data Sheet M15874EJ5V0DS
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