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PDF FDMF6730 Data sheet ( Hoja de datos )

Número de pieza FDMF6730
Descripción Driver plus FET Multi-chip Module
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMF6730 Hoja de datos, Descripción, Manual

August 2008
FDMF6730
Driver plus FET Multi-chip Module
Features
Over 95% efficiency
Internal 5V regulator for gate drive
6V-16V input range
1MHz max operating frequency
SMOD operation capability for light load efficiency
5A current capability (10A with PASS FET)
Current limit set by RDSON sensing to minimize power losses
Integrated bootstrap diode
Applications
Ultra Mobile PC
Notebook Computers
General Description
The FDMF6730 is a high efficiency Driver plus MOSFET power
stage solution optimized for Ultra Mobile PC (UMPC) system
power voltage supplies. It is fully compliant with the Intel Ultra-
Mobile Driver MOS (uDrMOS) Specification. The MOSFETs and
driver have been optimized to perform with high efficiency at
light and medium loads, ideal for compact PC devices.
The internal driver IC integrates two highly efficient LDOs for
internal gate-drive and external circuitry. The bootstrap diode is
also integrated within the IC. When operating with a single low
side MOSFET the uDrMOS module is capable of delivering up
to 5A of continuous current. The PASS transistor may be easily
routed in parallel with the low side MOSFET to provide up to
10A. The module also incorporates an over current protection
flag from an RDSON current sense architecture.
The device comes in a 6X6 Power QFN package for improved
thermal performance.
Typical Application
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LDO 5V OUT
LDO ENABLE
LDO OUT
PW M OUT
VCC
LDO 5V
VIN
BOOT
LDO EN
VSWH
LDO OUT
FDMF6730
LDO ADJ
PGND
LDRV
DRIVE HS
G_PASS
DRIVE LS
CS_OUT
D_PASS
CGND
CS_PROG S_PASS
VIN
VOUT
Figure 1. Power Train Application Circuit
Ordering Information
Part
FDMF6730
Current Rating
Max
[A]
10
Input Voltage
Typical
[V]
6-16
Frequency
Max
[KHz]
1000
©2008 Fairchild Semiconductor Corporation
FDMF6730 Rev. D2
1
Device
Marking
FDMF6730
www.fairchildsemi.com

1 page




FDMF6730 pdf
Description of Operation
2-Bit PWM Input
The PWM input is composed of a high side drive and a low side
drive input which control the high side and low side FETs
respectively. They can also be setup to provide asynchronous
rectification (low FET off) and phase shutoff (both FETs off).
Truth Table
DRIVE_LS DRIVE_HS
00
01
10
11
Low Side
MOSFET
OFF
OFF
ON
OFF
High Side
MOSFET
OFF
ON
OFF
OFF
PASS FET
One of the most unique features of the uDrMOS is the
integrated Pass FET. The pass FET can be easily routed in
parallel with the low side FET in order to provide up to 10A of
current. When not used as part of the DC-DC controller, it can
be used in other applications such as load switching, etc.
5V LDO
The uDrMOS conveniently incorporates a 5V LDO regulator to
drive the internal logic of the IC and gates of the internal
MOSFETs.
Adjustable LDO
Another feature of the part is the adjustable 100mA LDO. The
LDO output voltage is easily configured with a resistor divider.
Current Limit
The part also has current limit flag which is set by an internal
OCP topology.
Applications Section
Input Capacitor
A High frequency 4.7ceramic X5R must be connected directly
from VIN to GND
Bootstrap Circuit
The bootstrap circuit uses a charge storage capacitor and an
external diode. A minimum of 0.1 F high frequency capacitor
must be connected between the BOOT and PHASE pin. The
PHASE pin is already internally connected to the switch-node.
5V LDO
A minimum of 4.7 F ceramic X5R type must be connected from
LDO_5V pin to GND to ensure stable operation and to provide
high frequency bypassing for low side driver. This LDO can
provide power to the internal logic circuitry and gate drivers via
a 10Ohm resistor. A high frequency 1 F ceramic capacitor
must be placed from VCC to GND.
Adjustable LDO
A minimum of 10 F ceramic X5R type must be connected close
from this pin to GND to insure stable operation for a range of
2.5V to 5V outputs. For output voltages of 0.6V to 2.5V the
minimum capacitance must be 22 F ceramic type. A minimum
of 1mA load current must be connected from this pin to GND.
LDO_ADJ voltage 0.6V typical.
LDO_EN: Adjustable LDO enable pin (1= Enable, 0= Disable)
Over Current Protection
A resistor connected from the VSWH pin and this pin programs
the over current threshold point. CS_OUT is the output of an
internal current sense comparator which switches high when
the current in low side MOSFET exceeds a pre program level
set by the CS_PROG pin. This pin is low during normal
operation.
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5 www.fairchildsemi.com
FDMF6730 Rev. D2

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