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PDF FDD6776A Data sheet ( Hoja de datos )

Número de pieza FDD6776A
Descripción N-Channel MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDD6776A Hoja de datos, Descripción, Manual

January 2009
FDD6776A / FDU6776A_F071
N-Channel PowerTrench® MOSFET
25 V, 7.5 m
Features
General Description
„ Max rDS(on) = 7.5 mat VGS = 10 V, ID = 17.7 A
„ Max rDS(on) = 17.0mat VGS = 4.5 V, ID = 13.2 A
„ 100% UIL test
„ RoHS Compliant
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using either
synchronous or conventional switching PWM controllers. It has
been optimized for low gate charge, low rDS(on) and fast
switching speed.
Applications
„ Vcore DC-DC for Desktop Computers and Servers
„ VRM for Intermediate Bus Architecture
D
G
S
D-PAK
(TO-252)
D
G
G
D
S
Short-Lead I-PAK
(TO-251AA)
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
www.DataSheet4SUy.mcobmol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
Ratings
25
±20
30
54
17.7
100
32
39
3.7
-55 to +175
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
3.8
40
°C/W
Device Marking
FDD6776A
FDU6776A
Device
FDD6776A
FDU6776A_F071
Package
D-PAK (TO-252)
TO-251AA
Reel Size
13 ’’
N/A(Tube)
Tape Width
12 mm
N/A
Quantity
2500 units
75 units
©2009 Fairchild Semiconductor Corporation
FDD6776A / FDU6776A_F071 Rev.C
1
www.fairchildsemi.com

1 page




FDD6776A pdf
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 17.7 A
8
6
4
2
VDD = 10 V
VDD = 13 V
VDD = 16 V
0
0 4 8 12 16 20
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
24
3000
1000
Ciss
Coss
100
f = 1 MHz
VGS = 0 V
Crss
30
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. Capacitance vs Drain
to Source Voltage
30
100 60
TJ = 25 oC
10 TJ = 125 oC
TJ = 150 oC
1
0.0001
0.001 0.01 0.1
1
tAV, TIME IN AVALANCHE (ms)
10
Figure 9. Unclamped Inductive
Switching Capability
100
www.DataSheet4U.com
200
100
10 us
100 us
10
THIS AREA IS
LIMITED BY rDS(on)
1
0.1
1
SINGLE PULSE
TJ = MAX RATED
RθJC = 3.8 oC/W
TC = 25 oC
10
1 ms
10 ms
100 ms
DC
50
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
45
VGS = 10 V
30
Limited by Package
15
VGS = 4.5 V
0 RθJC = 3.8 oC/W
25 50 75
100 125 150
Tc, CASE TEMPERATURE (oC)
175
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
10000
1000
100
VGS = 10 V
SINGLE PULSE
RθJC = 3.8 oC/W
TC = 25 oC
10
10-5
10-4
10-3
10-2
10-1
t, PULSE WIDTH (sec)
1
10
Figure 12. Single Pulse Maximum
Power Dissipation
©2009 Fairchild Semiconductor Corporation
FDD6776A / FDU6776A_F071 Rev.C
5
www.fairchildsemi.com

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