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PDF FAN6210 Data sheet ( Hoja de datos )
| Número de pieza | FAN6210 | |
| Descripción | Primary-Side Synchronous Rectifier (SR) Trigger Controller | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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September 2009
FAN6210
Primary-Side Synchronous Rectifier (SR) Trigger Controller
for Dual Forward Converter
Features
Primary-Side Trigger Controller for Dual Forward
Converters with Synchronous Rectifier (SR)
Specialized SR Controller for Dual Forward
Converter
Programmable Turn-on Delay Time for the
Powering SR (RDLY Pin)
Winding Voltage Detection for Precision Control at
Light-Load Condition (DET Pin)
Green-Mode Operation to Improve Light-Load
Efficiency
Differential Mode Control Signal with Better Noise
Immunity
VDD Over-Voltage Protection (OVP)
Applications
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Personal Computer (PC) Power Supply
Entry-Level Server Power Supply
Description
FAN6210 is a primary-side trigger Integrated Circuit (IC)
specially designed for the synchronous rectifier (SR) in
dual forward converters employing FSR660/630.
FAN6210 provides drive signal for the primary-side
power switches by using an output signal from PWM
controller. FAN6210 can be combined with any PWM
controller that can drive a dual-forward converter. To
obtain optimal timing for the SR drive signals,
transformer winding voltage is also monitored. To
improve light-load efficiency, green mode operation is
employed, which disables the SR turn-on trigger signal,
minimizing gate drive power consumption at light load.
FAN6210 is available in 8-pin SOP package.
Ordering Information
Part Number
Operating
Temperature Range
FAN6210MY
-40°C to +105°C
Eco Status
Green
Package
8-Pin Small Outline
Package (SOP)
Packing Method
Tape & Reel
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2009 Fairchild Semiconductor Corporation
FAN6210 Rev. 1.0.1
www.fairchildsemi.com
1 page  
Electrical Characteristics
VDD=20V, TA=25℃, unless otherwise specified.
Symbol
Parameter
Conditions Min. Typ. Max. Units
VDD Section
VDD DC Supply Voltage
VDD-ON Turn-On Threshold Voltage
VTH-OFF Turn-Off Threshold Voltage
VDD-OVP VDD Over-Voltage Protection (OVP)
VDD-OVP-HYS Hysteresis voltage for VDD OVP
tOVP VDD OVP Debounce Time
SIN Section
VSIN
tDLY_OUTH
Logic Input Voltage
Delay Time Between SIN-HIGH and SOUT-HIGH
tDLY_OUTL Delay Time Between SIN-LOW and SOUT-LOW
tON_MAX SOUT Maximum On Time and Stop XP Pulse
DET Section
VDET_H Detect Input Voltage to Send XP After SOUT Falling
VDET_L Voltage to Drive XP Signal After SOUT Falling
tPD_DET Delay Time to Send XP
XP XN Section
tPLS_XN High-Level Pulsewidth of XN Signal
tPLS_XP High-Level Pulsewidth of XP Signal
tPD_XN
Delay Time to Trigger XN by SIN Rising or Falling Edge
DPLS_OFF SIN Duty Ratio Shorter than DPLS_OFF Stop XP Pulse
VXN XN Signal Output Voltage Level
VXP XP Signal Output Voltage Level
www.DataSheet4tUR_.cXoPm XP Rising Time
VDD = 15V;
CL = 100pF;
SOUT= 1V to 6V
tF_XP
XP Falling Time
VDD = 15V;
CL = 100pF;
SOUT= 7V to 2V
7 24
9 10 11
789
23.0 25.5 28.0
0.3 0.8 1.3
250
V
V
V
V
V
μs
10.5 24.5
240 300 350
75 100 150
8.5 10.0 12.0
V
ns
ns
μs
2.5 3.0 3.5
1.5 2.0 2.5
30 50 100
V
V
ns
250 300 350
600 700 800
25 50 75
10
5.5 8.0
5.5 8.0
30
ns
ns
ns
%
V
V
ns
30 ns
RDLY Section
VRDLY
RDLY Voltage
tDLY_XP Delay Time to Trigger XP by SOUT Rising Edge
VZ Output Voltage Maximum (Clamp)
VOL Output Voltage LOW
VOH Output Voltage HIGH
tR SOUT Rising Time
tF SOUT Falling Time
RRDLY=24kΩ
RRDLY=24kΩ
VDD=25V
VDD=15V; IO = 50mA
VDD=15V; IO = 50mA
VDD = 15V; CL = 5nF;
SOUT= 2V to 9V
VDD = 15V; CL = 5nF;
SOUT= 9V to 2V
1.08
280
10
30
30
1.20
340
70
50
1.32
400
18.5
1.5
120
100
V
ns
V
V
V
ns
ns
© 2009 Fairchild Semiconductor Corporation
FAN6210 Rev. 1.0.1
5
www.fairchildsemi.com
5 Page 
www.DataSheet4U.com
© 2009 Fairchild Semiconductor Corporation
FAN6210 Rev. 1.0.1
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet FAN6210.PDF ] | |
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