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PDF FAN100 Data sheet ( Hoja de datos )

Número de pieza FAN100
Descripción Primary-Side-Control PWM Controller
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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August 2008
FAN100
Primary-Side-Control PWM Controller
Features
ƒ Constant-Voltage (CV) and Constant-current (CC)
Control without Secondary-feedback Circuitry
ƒ Green Mode PWM Frequency Linearly Decreasing
ƒ Fixed PWM Frequency at 42kHz with Frequency
Hopping to Solve EMI Problem
ƒ Low Startup Current: 10μA
ƒ Low Operating Current: 3.5mA
ƒ Peak-Current-Mode Control in CV Mode
ƒ Cycle-by-Cycle Current Limiting
ƒ VDD Over-Voltage Protection with Auto-Restart
ƒ VDD Under-Voltage Lockout (UVLO)
ƒ Gate Output Maximum Voltage Clamped at 18V
ƒ Fixed Over-temperature Protection with Latch
ƒ SOP-8 Package Available
Applications
www.DataShƒeet4BUa.ctotemry chargers for cellular phones, cordless
phones, PDA, digital cameras, power tools
ƒ Replaces linear transformer and RCC SMPS
Related Resources
ƒ AN-6067 Design Guide for
FAN100/102/FSEZ1016A/1216
Description
This highly integrated PWM controller, FAN100,
provides several features to enhance the performance
of low-power flyback converters. The proprietary
topology enables simplified circuit design for battery
charger applications. A low-cost, smaller, and lighter
charger results when compared to a conventional
design or a linear transformer. The startup current is
only 10µA, which allows use of large startup resistance
for further power saving.
To minimize the standby power consumption, the
proprietary green-mode function provides off-time
modulation to linearly decrease PWM frequency under
light-load conditions. This green-mode function assists
the power supply meeting the power conservation
requirements.
Using FAN100, a charger can be implemented with
fewest external components and minimized cost. A
typical output CV/CC characteristic envelope is shown
in Figure 1.
FAN100 controller is available in an 8-pin SOP package.
Figure 1. Typical Output V-I Characteristic
Ordering Information
Part Number
Operating
Temperature Range
FAN100MY
-40°C to +105°C
Eco Status
Green
Package
8-Lead, Small Outline
Package (SOP-8)
Packing Method
Tape & Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2008 Fairchild Semiconductor Corporation
FAN100 Rev. 1.0.0
www.fairchildsemi.com

1 page




FAN100 pdf
Electrical Characteristics
VDD=15V and TA=25°C, unless otherwise specified.
Symbol
Parameter
Conditions
VDD SECTION
VOP
VDD-ON
VDD-OFF
IDD-OP
IDD-GREEN
VDD-OVP
tD-VDDOVP
Continuously Operating Voltage
Turn-On Threshold Voltage
Turn-Off Threshold Voltage
Operating Current
Green Mode Operating Supply
Current
VDD Over-Voltage Protection
Level
VDD Over-Voltage Protection
Debounce Time
VDD=20V, fS=fOSC,
VVS=2V,
VCS=3V, CL=1nF
VDD=20V, VVS=2.7V
fS=fOSC-N-MIN, VCS=0V
CL=1nF, VCOMV=0V
VCS=3V, VVS=2.3V
fS=fOSC, VVS=2.3V
OSCILLATOR SECTION
fOSC Frequency
Center
Frequency
Frequency
Hopping
Range
TA=25°C
TA=25°C
tFHR
fOSC-N-MIN
fOSC-CM-MIN
fDV
Frequency Hopping Period
Minimum Frequency at No Load
Minimum Frequency at CCM
Frequency Variation vs. VDD
Deviation
TA=25°C
VVS=2.7V, VCOMV=0V
VVS=2.3V, VCS=0.5V
VDD=10V to 25V
fDT
Frequency Variation vs.
Temperature Deviation
www.DataShVeOet4LUT.cAoGmE-SENSE SECTION
IVS-UVP
Sink Current for Brownout
Protection
Itc IC Compensation Bias Current
VBIAS-COMV
Adaptive Bias Voltage
Dominated by VCOMV
TA=-40°C to 85°C
RVS=20K
VCOMV=0V, TA=25°C,
RVS=20K
Min.
15
4.5
27
100
39
±1.8
Typ. Max. Units
25
16 17
5.0 5.5
3.5 5.0
V
V
V
mA
12
28 29
250 400
mA
V
μs
42 45
±2.6 ±3.6
3
550
20
5
15
KHz
ms
Hz
KHz
%
%
125 μA
9.5 μA
1.4 V
Continued on following page…
© 2008 Fairchild Semiconductor Corporation
FAN100 Rev. 1.0.0
5
www.fairchildsemi.com

5 Page





FAN100 arduino
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs at the sense resistor. To avoid premature
termination of the switching pulse, a leading-edge
blanking time is built in. Conventional RC filtering can be
omitted. During this blanking period, the current-limit
comparator is disabled and cannot switch off the gate
driver.
Built-in Slope Compensation
The sensed voltage across the current-sense resistor is
used for current-mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillations due to
peak-current mode control. The FAN100 has a
synchronized, positively-sloped ramp built-in at each
switching cycle.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
16V and 5V. During start-up, the hold-up capacitor must
be charged to 16V through the startup resistor to enable
the FAN100. The hold-up capacitor continues to supply
VDD until power can be delivered from the auxiliary
winding of the main transformer. VDD must not drop
below 5V during this startup process. This UVLO
hysteresis window ensures that hold-up capacitor is
adequate to supply VDD during start-up.
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulse-width jitter, particularly in
continuous-conduction mode. While slope
compensation helps alleviate these problems, further
precautions should still be taken. Good placement and
layout practices should be followed. Avoiding long PCB
traces and component leads, locating compensation
and filter components near the FAN100, and increasing
the power MOS gate resistance are advised.
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents damage due to
over-voltage conditions. When the voltage VDD exceeds
28V due to abnormal conditions, PWM pulses are
disabled until the VDD voltage drops below the UVLO,
then starts up again. Over-voltage conditions are usually
caused by open feedback loops.
Over-Temperature Protection (OTP)
The built-in temperature-sensing circuit to shut down
PWM output once the junction temperature exceeds
www.DataSh1e4e0t4°CU.cWomhile PWM output is shut down, the VDD voltage
gradually drops to the UVLO voltage. Some of the
FAN100’s internal circuits are shut down and VDD
gradually starts increasing again. When VDD reaches
16V, all the internal circuits, including the temperature
sensing circuit, start operating normally. If the junction
temperature is still higher than 140°C, the PWM
controller shuts down immediately. This situation
continues until the temperature drops below 110°C.
Gate Output
The BiCMOS output stage is a fast totem pole gate
driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance
reliability. The output driver is clamped by an internal
15V Zener diode to protect power MOSFET transistors
against undesired over-voltage gate signals.
© 2008 Fairchild Semiconductor Corporation
FAN100 Rev. 1.0.0
11
www.fairchildsemi.com

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