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PDF LE25FW403A Data sheet ( Hoja de datos )
| Número de pieza | LE25FW403A | |
| Descripción | 4M-bit Serial Flash Memory 30MHz SPI Bus | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : EN*A1229A
CMOS IC
LE25FW403A 4M-bit (512K×8) Serial Flash Memory
30MHz SPI Bus
Overview
The LE25FW403A is an onboard programmable flash memory device with a 512K×8-bit configuration. It uses a single
3.0V power supply and supports the serial interface. It has three erase functions depending on the size of memory area in
which the data is to be erased: the chip erase function, the sector (64K bytes) erase function, and a page (256 bytes) erase
function. A page program method is supported for data writing and it can program any amount of data from 1 to 256
bytes. The page program time depends on the number of bytes programmed and the IC provides a high-speed program
time of 1.5ms (typ) when programming 256 bytes at one time. Moreover, equipped with a page write function that allows
anywhere from 1 to 256 bytes of data in a page to be rewritten, this device is optimal for applications that perform small-
scale rewriting.
Features
• Read/write operations enabled by single 3.0V power supply: 2.7 to 3.6V supply voltage range
• Operating frequency : 30MHz
• Temperature range
: 0 to 70°C
• Serial interface
: SPI mode 0, mode 3 supported
• Sector size
: 256 bytes/page sector, 64K bytes/sector
• Page erase, sector erase, chip erase functions
• Page program function (1 to 256 bytes/page), Page write function (1 to 256 bytes/page)
• Hardware protect function (lower 256 pages)
• Hardware reset function
Continued on next page.
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by
SANYO Semiconductor Co., Ltd.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
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70208 SY IM No.A1229-1/18
1 page  
Figure 4 Serial Output Timing
CS
LE25FW403A
SCK
SO
SI
tCLZ
tHO
DATA VALID
tV
tCHZ
Command Definition
"Table 2 Command Settings" provides a list and overview of the commands. A detailed description of the functions and
operations corresponding to each command is presented below.
1. Read
Figure 5 shows the read timing waveforms.
There are two read commands, the 4 bus cycle read and 5 bus cycle read. Consisting of the first through fourth bus
cycles, the 4 bus cycle read inputs the 24-bit address following (03h) and the data in the designated address is output
synchronized to SCK. The data is output on the falling clock edge of fourth bus cycle bit 0.
Consisting of the first through fifth bus cycles, the 5 bus cycle read command inputs the 24-bit addresses and 8 dummy
bits following (0Bh). The data is output using the falling clock edge of fifth bus cycle bit 0. The only difference
between these two commands is whether the dummy bits in the fifth bus cycle are input.
While SCK is being input, the address is automatically incremented inside the device and the corresponding data is
output in sequence.
If the SCK input is continued after the data up to the highest address (7FFFFh) is output, the internal address returns to
the lowest address (00000h) and data output is continued.
By setting the logic level of CS to high, the device is deselected, and the read cycle ends. While the device is deselected,
the output pin is in a high-impedance state.
Figure 5: Read
4 Bus Read
CS
SCK
SI
SO
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Mode3
Mode0
0 1 2 3 4 5 6 7 8 15 16 23 24 31 32 39 40 47
8CLK
03h
Add. Add. Add.
High Impedance
N N+1 N+2
DATA DATA DATA
MSB MSB MSB
No.A1229-5/18
5 Page 
LE25FW403A
10. Page Write
Page write operation can be used to rewrite any number of bytes of data from 1 to 256 bytes in a page (page addresses:
A18 to A8) without executing erase operation beforehand. Figure 15 shows the timing waveforms, and Figure 23 shows
a flowchart. After CS is set low, the command code (0AH) is input followed by the 24-bit addresses. Addresses A18 to
A0 are valid. After this, re-write data can be loaded until CS rises. If loaded data exceeds 256 bytes, the 256 bytes
loaded last are programmed. If the loaded data is less than 256 bytes, data not loaded on the same page is not rewritten.
In addition, if the address of data being loaded reaches the last address of a page (A7 to A0: FFh), the device returns to
the start address of the same page (A7 to A0: 00h).
Rewrite data must be loaded in 1-byte units. The rewrite operation is not performed if data is loaded in less than byte
units and CS is set high. The page write time depends on the number of rewrites. The page write time is 11ms
(typ)/22.5ms (max) for up to 104 rewrites, or 25ms (typ)/300ms (max) for up to 105 rewrites.
Figure 15 Page Write
CS
Self-timed
Write Cycle
tPW
SCK
SI
Mode3 0 1 2 3 4 5 6 7 8
Mode0
15 16 23 24
32 39 40 47
8CLK
0Ah
Add. Add. Add. PD
PD
2079
PD
High Impedance
SO
11. Silicon ID Read
Silicon ID read allows manufacturer code and device code information to be read. Figure 16 shows the timing
waveforms, and Table 6 gives the silicon ID codes.
Table 6 Silicon ID Codes
Manufacturer code
Device code
Dummy code
Output Code
62h
11h
00h
The silicon ID read command consists of only the first bus cycle. If (9Fh) is input, the manufacturer code 62h, device
code 11h, and dummy code 00h are output in synchronization with the falling edge of SCK. If SCK input continues, the
IC repeatedly outputs the data described above.
Data output is performed from the falling edge of clock at the first bus cycle, bit 0. Silicon ID read is terminated by
making CS go to high logic level.
The silicon ID read command is not accepted during write operations.
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No.A1229-11/18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet LE25FW403A.PDF ] | |
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