DataSheet.es    


PDF SC16C550B Data sheet ( Hoja de datos )

Número de pieza SC16C550B
Descripción UART
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



Hay una vista previa y un enlace de descarga de SC16C550B (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! SC16C550B Hoja de datos, Descripción, Manual

SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
Rev. 6 — 16 December 2014
Product data sheet
1. General description
The SC16C550B is a Universal Asynchronous Receiver and Transmitter (UART) used for
serial data communications. Its principal function is to convert parallel data into serial data,
and vice versa. The UART can handle serial data rates up to 3 Mbit/s.
The SC16C550B is pin compatible with the ST16C550, TL16C550 and PC16C550, and it
will power-up to be functionally equivalent to the 16C450. The SC16C550B also provides
DMA mode data transfers through FIFO trigger levels and the TXRDY and RXRDY
signals (TXRDY and RXRDY are not supported in the HVQFN32 package). On-board
status registers provide the user with error indications, operational status, and modem
interface control. System interrupts may be tailored to meet user requirements. An internal
loopback capability allows on-board diagnostics.
The SC16C550B operates at 5 V, 3.3 V and 2.5 V, and the Industrial temperature range,
and is available in plastic HVQFN32, DIP40, PLCC44 and LQFP48 packages.
2. Features and benefits
5 V, 3.3 V and 2.5 V operation
Industrial temperature range
After reset, all registers are identical to the typical 16C450 register set
Capable of running with all existing generic 16C450 software
Pin compatibility with the industry-standard ST16C450/550, TL16C450/550,
PC16C450/550
Up to 3 Mbit/s transmit/receive operation at 5 V, 2 Mbit/s at 3.3 V, and 1 Mbit/s at 2.5 V
5 V tolerant on input only pins1
16 byte transmit FIFO
16 byte receive FIFO with error flags
Programmable auto-RTS and auto-CTS
In auto-CTS mode, CTS controls transmitter
In auto-RTS mode, RX FIFO contents and threshold control RTS
Automatic hardware flow control
Software selectable baud rate generator
Four selectable Receive FIFO interrupt trigger levels
Standard modem interface
Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun Break)
Independent receiver clock input
Transmit, Receive, Line Status, and Data Set interrupts independently controlled
1. For data bus pins D7 to D0, see Table 24 “Limiting values”.

1 page




SC16C550B pdf
NXP Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
n.c. 1
D5 2
D6 3
D7 4
RCLK 5
n.c. 6
RX 7
TX 8
CS0 9
CS1 10
CS2 11
BAUDOUT 12
SC16C550BIB48
Fig 4. Pin configuration for LQFP48
36 n.c.
35 RESET
34 OUT1
33 DTR
32 RTS
31 OUT2
30 INT
29 RXRDY
28 A0
27 A1
26 A2
25 n.c.
002aaa583
D0 1
D1 2
40 VDD
39 RI
D2 3
38 DCD
D3 4
37 DSR
D4 5
36 CTS
D5 6
35 RESET
D6 7
34 OUT1
D7 8
33 DTR
RCLK 9
32 RTS
RX 10
31 OUT2
SC16C550BIN40
TX 11
30 INT
CS0 12
29 RXRDY
CS1 13
28 A0
CS2 14
27 A1
BAUDOUT 15
26 A2
XTAL1 16
25 AS
XTAL2 17
24 TXRDY
IOW 18
23 DDIS
IOW 19
22 IOR
VSS 20
21 IOR
002aaa584
Fig 5. Pin configuration for DIP40
SC16C550B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 49

5 Page





SC16C550B arduino
NXP Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
6.3 Autoflow control
Autoflow control is comprised of auto-CTS and auto-RTS (see Figure 6). With auto-CTS,
the CTS input must be active before the transmitter FIFO can emit data. With auto-RTS,
RTS becomes active when the receiver needs more data and notifies the sending serial
device. When RTS is connected to CTS, data transmission does not occur unless the
receiver FIFO has space for the data; thus, overrun errors are eliminated using UART 1
and UART 2 from a SC16C550B with the autoflow control enabled. If not, overrun errors
occur when the transmit data rate exceeds the receiver FIFO read latency.
UART 1
UART 2
D7 to D0
RX
FIFO
TX
FIFO
SERIAL TO
PARALLEL
RX
FLOW
CONTROL
RTS
PARALLEL
TO SERIAL
TX
FLOW
CONTROL
CTS
TX PARALLEL
TO SERIAL
CTS
FLOW
CONTROL
RX SERIAL TO
PARALLEL
RTS
FLOW
CONTROL
Fig 6. Autoflow control (auto-RTS and auto-CTS) example
TX
FIFO
RX
FIFO
D7 to D0
002aaa228
6.3.1 Auto-RTS
Auto-RTS data flow control originates in the receiver timing and control block (refer to
Figure 1 “Block diagram of SC16C550B”) and is linked to the programmed receiver FIFO
trigger level (see Figure 6). When the receiver FIFO level reaches a trigger level of 1, 4,
or 8 (see Figure 8), RTS is de-asserted. With trigger levels of 1, 4, and 8, the sending
UART may send an additional byte after the trigger level is reached (assuming the
sending UART has another byte to send) because it may not recognize the de-assertion
of RTS until after it has begun sending the additional byte. RTS is automatically
reasserted once the RX FIFO is emptied by reading the receiver buffer register. When the
trigger level is 14 (see Figure 9), RTS is de-asserted after the first data bit of the 16th
character is present on the RX line. RTS is reasserted when the RX FIFO has at least one
available byte space.
6.3.2 Auto-CTS
The transmitter circuitry checks CTS before sending the next data byte (see Figure 6).
When CTS is active, it sends the next byte. To stop the transmitter from sending the
following byte, CTS must be released before the middle of the last stop bit that is currently
being sent (see Figure 7). The auto-CTS function reduces interrupts to the host system.
When flow control is enabled, CTS level changes do not trigger host interrupts because
the device automatically controls its own transmitter. Without auto-CTS, the transmitter
sends any data present in the transmit FIFO and a receiver overrun error may result.
SC16C550B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 49

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet SC16C550B.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
SC16C550Universal Asynchronous Receiver/Transmitter (UART) with 16-byte FIFO and infrared (IrDA) encoder/decoderNXP Semiconductors
NXP Semiconductors
SC16C550BUARTNXP Semiconductors
NXP Semiconductors
SC16C550IA44Universal Asynchronous Receiver/Transmitter (UART) with 16-byte FIFO and infrared (IrDA) encoder/decoderNXP Semiconductors
NXP Semiconductors
SC16C550IB48Universal Asynchronous Receiver/Transmitter (UART) with 16-byte FIFO and infrared (IrDA) encoder/decoderNXP Semiconductors
NXP Semiconductors

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar