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Número de pieza | ICS524 | |
Descripción | LOW SKEW 1 TO 4 CLOCK BUFFER | |
Fabricantes | Integrated Device Technology | |
Logotipo | ||
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LOW SKEW 1 TO 4 CLOCK BUFFER
DATASHEET
ICS524
Description
The ICS524 is a low skew, single input to four output, clock
buffer. Part of ICS’ ClockBlocksTM family, this is our lowest
skew, small clock buffer.
See the ICS552-02 for a 1 to 8 low skew buffer. For more
than eight outputs, see the MK74CBxxx BuffaloTM series of
clock drivers.
ICS makes many non-PLL and PLL based low skew output
devices as well as Zero Delay Buffers to synchronize
clocks. Contact us for all of your clocking needs.
Features
• Extremely low skew outputs (50 ps maximum)
• Packaged in 8-pin SOIC
• Available in Pb (lead) free package
• Low power CMOS technology
• Operating voltages of 2.5 V to 5 V
• Output Enable pin tri-states outputs
• 5 V tolerant input clock
• Industrial temperature range
Block Diagram
ICLK
Q0
Q1
Q2
Q3
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER
1
ICS524
REV A 101705
1 page ICS524
LOW SKEW 1 TO 4 CLOCK BUFFER
www.DataSheet4U.com
FAN OUT BUFFER
AC Electrical Characteristics
VDD = 2.5 V ±5%, Ambient Temperature -40 to +85°C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency
0 200 MHz
Output Rise Time
Output Fall Time
Propagation Delay
tOR 0.8 to 2.0 V, CL=15 pF
1.0 1.5 ns
tOF 2.0 to 0.8 V, CL=15 pF
1.0 1.5 ns
Note 1
2.2 3 5 ns
Output to Output Skew
Note 2 Rising edges at VDD/2
0 50 ps
Device to Device Skew
Rising edges at VDD/2
500 ps
VDD = 3.3 V ±5%, Ambient Temperature -40 to +85°C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency
0 200 MHz
Output Rise Time
Output Fall Time
Propagation Delay
tOR 0.8 to 2.0 V, CL=15 pF
0.6 1.0 ns
tOF 2.0 to 0.8 V, CL=15 pF
0.6 1.0 ns
Note 1
2.0 2.4 4
ns
Output to Output Skew
Note 2 Rising edges at VDD/2
0 50 ps
Device to Device Skew
Rising edges at VDD/2
500 ps
VDD = 5 V ±5%, Ambient Temperature -40 to +85°C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency
0 200 MHz
Output Rise Time
Output Fall Time
Propagation Delay
tOR 0.8 to 2.0 V, CL=15 pF
0.3 0.7 ns
tOF 2.0 to 0.8 V, CL=15 pF
0.3 0.7 ns
Note 1
1.8 2.5 4
ns
Output to Output Skew
Note 2 Rising edges at VDD/2
0 50 ps
Device to Device Skew
Rising edges at VDD/2
500 ps
Notes: 1. With rail to rail input clock
2. Between any 2 outputs with equal loading.
3. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock
generators.
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
θJA 3 m/s air flow
Thermal Resistance Junction to Case θJC
Min.
Typ.
150
140
120
40
Max.
Units
°C/W
°C/W
°C/W
°C/W
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER
5
ICS524
REV A 101705
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet ICS524.PDF ] |
Número de pieza | Descripción | Fabricantes |
ICS524 | LOW SKEW 1 TO 4 CLOCK BUFFER | Integrated Device Technology |
ICS525-01 | (ICS525-01/02) User Configurable Clock | Integrated Circuit Systems |
ICS525-02 | (ICS525-01/02) User Configurable Clock | Integrated Circuit Systems |
ICS525-03 | PECL Input OSCaR-TM USER Configurable Clock | Integrated Circuit Systems |
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