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Número de pieza | NCP5212A | |
Descripción | Single Synchronous Step-Down Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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Single Synchronous
Step-Down Controller
The NCP5212A is a synchronous stepdown controller for high
performance systems battery−power systems. The NCP5212A
includes a high efficiency PWM controller. A pin is provided to allow
two devices in interleaved operation. An internal power good voltage
monitor tracks the SMPS output. NCP5212A also features soft−start
sequence, UVLO for VCC and switcher, overvoltage protection,
overcurrent protection, undervoltage protection and thermal
shutdown. The IC is packaged in QFN16
Features
• 0.8% accuracy 0.8 V Reference
• 4.5 V to 27 V Battery/Adaptor Voltage Range
• Adjustable Output Voltage Range: 0.8 V to 3.3 V
• Synchronization Interleaving between two NCP5212As
• Skip mode for power saving operation at light load
• Lossless Inductor Current Sensing
• Programmable Transient−Response−Enhancement (TRE) Control
• Programmable Adaptive Voltage Positioning (AVP)
• Input Supply Feedforward Control
• Internal Soft−Start
• Integrated Output Discharge (Soft−Stop)
• Build−in Adaptive Gate Drivers
• PGOOD Indication
• Overvoltage, Undervoltage and Overcurrent Protections
• Thermal Shutdown
• QFN16 Package
• This is a Pb−Free Device
Typical Applications
• Notebook Application
• System Power
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1
QFN16
CASE 485AP
MARKING
DIAGRAM
16
1
N5212
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
16 15 14 13
VIN 1
VCC 2
SYN 3
EN 4
NCP5212A
12 VCCP
11 DL/TRESET
10 PGND
9 CS+
5678
QFN16
(Top View)
© Semiconductor Components Industries, LLC, 2009
May, 2009 − Rev. 0
ORDERING INFORMATION
Device
Package
Shipping†
NCP5212AMNTXG QFN16
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1 Publication Order Number:
NCP5212A/D
1 page NCP5212A
www.DataSPhINeeFt4UUN.cComTION DESCRIPTION
Pin No.
Symbol
Description
1 VIN Input voltage used for feed forward in switcher operation.
2
VCC
Supply for analog circuit
3
SYN
Synchronization interleaving use.
4 EN This pin serves as two functions. Enable: Logic control for enabling the switcher. MASTER/SLAVE:
To program the device as MASTER or SLAVE mode at dual device operation.
5
COMP
Output of the error amplifier.
6 FB Output voltage feed back.
7
IDRP/OCP
Current limit programmable and setting for AVP.
8
CS−/Vo
Inductor current differential sense inverting input.
9 CS+ Inductor current differential sense non−inverting input.
10
PGND
Ground reference and high−current return path for the bottom gate driver.
11
DL/TRESET
Gate driver output of bottom N−channel MOSFET. It also has the function for TRE threshold setting.
12
VCCP
Supply for bottom gate driver.
13 BST Top gate driver input supply, a bootstrap capacitor connection between SWN and this pin.
14 DH Gate driver output of top N−channel MOSFET.
15
SWN
Switch node between top MOSFET and bottom MOSFET.
16
PGOOD
Power good indicator of the output voltage. High impendence if power good (in regulation). Low im-
pendence if power not good.
17
TPAD
Copper pad on bottom of IC used for heat sinking. This pin should be connected to the analog ground
plane under the IC.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC Power Supply Voltage to AGND
VIN Supply to AGND
High−side Gate Drive Supply: BST to SWN
High−side Gate Drive Voltage: DH to SWN
Low−side Gate Drive Supply: VCCP to PGND
Low−side Gate Drive Voltage: DL to PGND
Input / Output Pins to AGND
Switch Node SWN−PGND
VCC
VIN
VBST−VSWN,
VDH−VSWN,
VCCP−VPGND,
VDL−VPGND,
VIO
VSWN
−0.3, 6.0
−0.3, 30
−0.3, 6.0
V
V
V
−0.3, 6.0
−5 V (< 100 ns)
30 V
V
V
High−Side Gate Drive/Low−Side Gate Drive Outputs
DH, DL
−3(DC)
V
PGND
VPGND
−0.3, 0.3
V
Thermal Characteristics
Thermal Resistance Junction−to−Ambient (QFN16 Package)
RqJA
°C/W
48
Operating Junction Temperature Range (Note 1)
TJ
−40 to + 150
°C
Operating Ambient Temperature Range
TA
− 40 to + 85
°C
Storage Temperature Range
Tstg
− 55 to +150
°C
Moisture Sensitivity Level
MSL
1−
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
1. Internally limited by thermal shutdown, 150°C min.
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5
5 Page www.DataSheet4U.com
NCP5212A
TYPICAL OPERATING CHARACTERISTICS
Top to Bottom: EN, SWN, Vo, PGOOD
Figure 10. Powerup Sequence
Top to Bottom: EN, SWN, Vo, PGOOD
Figure 11. Powerdown Sequence
Top to Bottom: SWN_Slave, Vo_Slave, SWN_Master,
Sync_clk
Figure 12. From Unsync to Sync
Top to Bottom: SWN_Slave, Vo_Slave, SWN_Master,
Sync_clk
Figure 13. From Sync to Unsync
Top to Bottom: SWN, Vo, Io
Figure 14. Typical Transient
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11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet NCP5212A.PDF ] |
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