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PDF S-8204B Data sheet ( Hoja de datos )

Número de pieza S-8204B
Descripción BATTERY PROTECTION IC
Fabricantes Seiko 
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S-8204B Series
www.sii-ic.com
© Seiko Instruments Inc., 2008-2015
BATTERY PROTECTION IC
FOR 3-SERIES OR 4-SERIES CELL PACK
Rev.3.7_00
The S-8204B Series includes high-accuracy voltage detection circuits and delay circuits, in single use, makes it possible for
users to monitor the status of 3-series or 4-series cell lithium-ion rechargeable battery. By switching the voltage level which
is applied to the SEL pin, users are able to use the S-8204B Series either for 3-series or 4-series cell pack.
By cascade connection using the S-8204B Series, it is also possible to protect 6-series or more cells*1 lithium-ion
rechargeable battery pack.
*1. Refer to the application note for connection examples of protection circuit for 6-series or more cells.
In case of protecting 5-series cell lithium-ion rechargeable battery pack, contact our sales office.
Features
High-accuracy voltage detection function for each cell
Overcharge detection voltage n (n = 1 to 4)
Overcharge release voltage n (n = 1 to 4)
3.65 V to 4.6 V (50 mV step)
3.5 V to 4.6 V*1
Accuracy ±25 mV
Accuracy ±50 mV
Overdischarge detection voltage n (n = 1 to 4)
Overdischarge release voltage n (n = 1 to 4)
2.0 V to 3.0 V (100 mV step)
2.0 V to 3.4 V*2
Accuracy ±80 mV
Accuracy ±100 mV
Discharge overcurrent detection in 3-step
Discharge overcurrent detection voltage 1
0.05 V to 0.30 V (50 mV step)
Accuracy ±15 mV
Discharge overcurrent detection voltage 2
0.5 V (fixed)
Accuracy ±100 mV
Load short-circuit detection voltage
1.0 V (fixed)
Accuracy ±300 mV
Settable by external capacitor; overcharge detection delay time, overdischarge detection delay time, discharge
overcurrent detection delay time 1, discharge overcurrent detection delay time 2
(Load short-circuit detection delay time is internally fixed.)
Switchable between 3-series and 4-series cell by using the SEL pin
Independent charge and discharge control by the control pins
High-withstand voltage element
Absolute maximum rating: 24 V
Wide operation voltage range
2 V to 22 V
Wide operation temperature range
Ta = 40°C to +85°C
Low current consumption
During operation
33 μA max. (Ta = +25°C)
During power-down
Lead-free, Sn 100%, halogen-free*3
0.1 μA max. (Ta = +25°C)
*1. Overcharge hysteresis voltage n (n = 1 to 4) is selectable in 0 V, or in 0.1 V to 0.4 V in 50 mV step.
(Overcharge hysteresis voltage = Overcharge detection voltage Overcharge release voltage)
*2. Overdischarge hysteresis voltage n (n = 1 to 4) is selectable in 0 V, or in 0.2 V to 0.7 V in 100 mV step.
(Overdischarge hysteresis voltage = Overdischarge release voltage Overdischarge detection voltage)
*3. Refer to "Product Name Structure" for details.
Application
Rechargeable lithium-ion battery pack
Package
16-Pin TSSOP
Seiko Instruments Inc.
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S-8204B pdf
Rev.3.7_00
BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
S-8204B Series
Pin Configuration
1. 16-Pin TSSOP
Top view
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
Figure 2
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
COP
VMP
DOP
VINI
CDT
CCT
CIT
SEL
VSS
VC4
VC3
VC2
VC1
VDD
CTLD
CTLC
Table 3
Description
Connection pin of charge control FET gate (Pch open-drain output)
Voltage detection pin between VDD pin and VMP pin
Connection pin of discharge control FET gate (CMOS output)
Voltage detection pin between VSS pin and VINI pin,
discharge overcurrent 1 / 2 detection pin, load short-circuit detection pin
Capacitor connection pin for delay for overdischarge detection
Capacitor connection pin for delay for overcharge detection
Capacitor connection pin for delay for discharge overcurrent 1 / 2
Pin for switching 3-series or 4-series cell
VSS level: 3-series cell
VDD level: 4-series cell
Input pin for negative power supply,
connection pin for negative voltage of battery 4
Connection pin for negative voltage of battery 3,
connection pin for positive voltage of battery 4
Connection pin for negative voltage of battery 2,
connection pin for positive voltage of battery 3
Connection pin for negative voltage of battery 1,
connection pin for positive voltage of battery 2
Connection pin for positive voltage of battery 1
Input pin for positive power supply,
connection pin for positive voltage of battery 1
Discharge FET control pin
Charge FET control pin
Seiko Instruments Inc.
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S-8204B arduino
Rev.3.7_00
BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
S-8204B Series
3. 7 CIT pin detection voltage (VCIT)
The CIT pin detection voltage (VCIT) is the voltage at the CIT pin when the DOP pin's voltage is set to "L" (voltage
VDS × 0.1 V or less) after increasing the CIT pin's voltage gradually, after setting VVINI = VDIOV1 max. + 0.05 V from
the initial status.
3. 8 Load short-circuit detection delay time (tSHORT)
Load short-circuit detection delay time (tSHORT) is a period in which the VINI pin's voltage changes from "H" to "L"
by changing the VINI pin's voltage instantaneously from the initial status to VSHORT max. + 0.05 V.
4. 0 V battery charge starting voltage (0 V battery charge function "available"), 0 V battery charge
inhibition battery voltage (0 V battery charge function "unavailable")
(Test circuit 2)
Confirm both COP pin and DOP pin are in "H" (its voltage level is VDS × 0.9 V or more) after setting VVMP = VSEL =
VCTLC = VCTLD = VDD, VVINI = VSS, CCT pin = Open, CDT pin = Open, CIT pin = Open, V1 = V2 = V3 = V4 = 3.5 V.
(This status is referred to as initial status.)
According to user's selection of the function to charge 0 V battery, either function of voltage for start charging 0 V
battery or battery voltage for inhibit charging 0 V battery is applied to each product.
4. 1 0 V battery charge starting voltage (V0CHA) (0 V battery charge function "available")
0 V battery charge starting voltage (V0CHA) is a voltage at V1; when a voltage at the COP pin is set to "H" after
increasing a voltage at V1 gradually, after setting V1 = V2 = V3 = V4 = 0 V from the initial status.
4. 2 0 V battery charge inhibition battery voltage (V0INH) (0 V battery charge function "unavailable")
0 V battery charge inhibition battery voltage (V0INH) is a voltage at V1; when a voltage at the COP pin is set to "L"
after decreasing a voltage at V1 gradually from the initial status.
5. Resistance between VMP pin and VDD pin, resistance between VMP pin and VSS pin, VC1 pin
current, VC2 pin current, VC3 pin current, VC4 pin current, CTLC pin current "H", CTLC pin
current "L", CTLD pin current "H", CTLD pin current "L", SEL pin current "H", SEL pin current
"L", COP pin source current, COP pin leakage current, DOP pin source current, DOP pin sink
current
(Test circuit 4)
Set VCTLC = VCTLD = VVMP = VSEL = VDD, VVINI = VSS, V1 = V2 = V3 = V4 = 3.5 V, set other pins open. (This status is
referred to as initial status.)
5. 1 Resistance between VMP pin and VDD pin (RVMD)
The value of resistance between VMP pin and VDD pin (RVMD) can be defined by RVMD = VDS / IVMD by using the
VMP pin's current (IVMD) when VVINI = 1.5 V and VVMP = VSS after the initial status.
5. 2 Resistance between VMP pin and VSS pin (RVMS)
The value of resistance between VMP pin and VSS pin (RVMS) can be defined by RVMS = VDS / IVMS by using the
VMP pin's current (IVMS) when V1 = V2 = V3 = V4 = 1.8 V after the initial status.
5. 3 VC1 pin current (IVC1), VC2 pin current (IVC2), VC3 pin current (IVC3), VC4 pin current (IVC4)
In the initial status, each current flows in the VC1 pin, VC2 pin, VC3 pin, VC4 pin is the VC1 pin current (IVC1), the
VC2 pin current (IVC2), the VC3 pin current (IVC3), the VC4 pin current (IVC4), respectively.
5. 4 CTLC pin current "H" (ICTLCH), CTLC pin current "L" (ICTLCL)
In the initial status, a current which flows in the CTLC pin is the CTLC pin current "H" (ICTLCH). After that,
decreasing a voltage at the CTLC pin gradually, the maximum current which flows in the CTLC pin is; the CTLC
pin current "L" (ICTLCL).
Seiko Instruments Inc.
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