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PDF OXU210HP Data sheet ( Hoja de datos )

Número de pieza OXU210HP
Descripción USB2.0 High Speed Peripheral and OTG Controller
Fabricantes Oxford Semiconductor 
Logotipo Oxford Semiconductor Logotipo



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Data Sheet
OXU210HP
USB2.0 High-Speed Host, Peripheral and OTG Controller
Features
„ Highperformance, highspeed USB dualrole (host/peripheral) 
controller 
„ Compatible with the Universal Serial Bus Specification, Revision 2.0 
for highspeed (480 Mb/s), fullspeed (12 Mb/s), and lowspeed 
(1.5 Mb/s) operations
„ Highspeed optimized host controller with transaction translator 
for complete backward compatibility with fullspeed and 
lowspeed products
„ Two highspeed USB ports; one port remains host while the other 
can be configured as peripheral, host, or OTG (dual role)
„ Simultaneous operation of both ports
„ Processor interface is either 16 bits (BGA) or configurable 16 or 32 
bits (LQFP)
„ Fast microprocessor access cycle and double/multi buffering 
support for USB transfers
„ Host interface contains support for common SoC DMA modes 
including bursting and slave request/acknowledge protocols
„ Complete host, peripheral and OTG software solutions for 
popular microprocessors using many of the most popular 
operating systems
„ Advanced power management controls chip clocking and PHY 
function for very low power consumption
„ Integrated onchip VBUS voltage comparator and 100 mA charge 
pump
„ 72 Kbytes of singleport SRAM provides space for data structures 
and buffer space for transfer data
„ True transfer level operation, with transaction scheduling and 
handling (data sequence toggle, error retry, etc.), implemented in 
hardware
„ Integrated PLL runs from a single 12MHz crystal or an external 
12MHz clock source
DS-0037 Dec 06
External—Free Release
1

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OXU210HP pdf
www.DataSOhxefoertd4US.ecmomiconductor, Inc.
OXU210HP Data Sheet
Electrical
Characteristics
Table 1 to  Table 10 detail the required operating conditions for the 
device and the DC and AC electrical characteristics.
Table 1 Absolute Maximum Device Ratings
Symbol
VPWM3,
VDD3IO
VDD3.3A
VDD1.8
VIO
VI
TS
Parameter
3.3 V digital power supply
3.3 V analog power supply
1.8 V power supply
1.65 V to 3.3 V power
supply
DC input voltage
Storage temperature
Condition
Min Max Unit
-0.3 4.0 V
-0.3 4.0 V
-0.3 2.16 V
-0.3 4.0 V
-0.3 4.0 V
-40 +150 °C
Note: 
1 Permanent device damage may occur if absolute maximum ratings are exceeded. 
Functional operation should be restricted to the normal operating conditions 
specified in the following section. Exposure to absolute maximum rating conditions 
for extended periods may affect device reliability.
Table 2 Recommended Operating Conditions
Symbol
VPWM3,
VDD3IO
VDD3.3A
VDD1.8
VIO
VI3.3
VIW
TO
Parameter
3.3 V digital power supply
3.3 V analog power supply
1.8 V power supply
1.65 - 3.3 V
wide-range I/O power supply
DC input voltage of 3.3 V pins
DC input voltage of wide-range pins
Operating temperature
Condition
Min Max Unit
3.0 3.6
V
3.0 3.6
1.62 1.98
1.65 3.6
0 3.6
0 VIO + 0.3
-40 +85
V
V
V
V
V
°C
Table 3 DC Characteristics, Full-Speed USB I/O Signals: DP_HOST, DM_HOST, DP_OTG, DM_OTG
Symbol
Parameter
Condition
Min Max
VDI
VCM
VOL
VOH
VCRS
CIN
Diff. input sensitivity
Diff. comm. mode range
Static output low
Static output high
Output signal crossover
Input capacitance
|VI(DP) – VI(DM)|
0.2 --
0.8 2.5
-- 0.3
2.8 3.6
1.3 2.0
20
Unit
V
V
V
V
V
pF
DS-0037 Dec 06
External—Free Release
5

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OXU210HP arduino
www.DataSOhxefoertd4US.ecmomiconductor, Inc.
OXU210HP Data Sheet
Table 12 OXU210HP 128-Pin LQFP Pin Allocations (Sheet 2 of 2)
Pin No. Type(1)
Bits
Name
Description
67 1
VPWM3
Analog 3.3 V power for the charge pump Pulse Width
Modulator (PWM)
USB Interface (9 pins)
48, 49
2B
DP_HOST, DM_HOST
Data lines for host port. If not used, these pins should
be left floating
62, 63
2B
DP_OTG, DM_OTG
Data lines for OTG port. If not used, these pins
should be left floating
71
1 5I
VBUS
VBUS input used by the voltage comparators of the
OTG port for connection. This pin should be left
floating in a host-only application
75
1 P5O
/EXVBO
76
1 P5IU
/OC
Turn on/off the external VBUS (5 V) for OTG
operation (1:VBUS off, 0: VBUS on) when using the
external VBUS source
Over current condition indicator for powered host
ports
77
1 P5IU
ID
Connected to the ID pin of the mini-AB connector for
OTG applications. With the help of an internal pull-up
resistor, this pin determines the chip’s responsibility
in an OTG application (0: A-device, 1:B-device)
78
1 P5OT
/PO
Turn on/off gang power for all host ports
Clock Interface (2 pins)
57
1I
XSCI
Input. A 12 MHz passive crystal should be connected
across the two pins (XSCI and XSCO). Optionally, a
12 MHz oscillator can be sourced through XSCI
while keeping XSCO unconnected
58
1O
XSCO
Output
Internal VBUS Charge Pump (3 pins)
69 1 O
PD_PMOS
66
1O
EXT
Internal charge pump output for P-MOSFET (optional
switch on the VOUT)
Internal charge pump output for N-MOSFET
70
Test (9 pins)
1I
VOUT
Internal charge pump output voltage feedback pin
85, 86, 87, 88, 8 OC
100, 101, 102,
103
DEBUG0 - DEBUG7
Debug outputs
89
1I
TEST
Factory test mode. This pin should be grounded or
left floating (has an internal pull-down) for normal
operation
Miscellaneous (2 pins)
50
1B
REF_HOST
Connect external reference resistor (12 KW +/ 
61
1B
REF_OTG
1%) to VSSA. One per port
DS-0037 Dec 06
External—Free Release
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