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PDF KK4015B Data sheet ( Hoja de datos )

Número de pieza KK4015B
Descripción Dual 4-Stage Static Shift Register
Fabricantes KODENSHI KOREA 
Logotipo KODENSHI KOREA Logotipo



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No Preview Available ! KK4015B Hoja de datos, Descripción, Manual

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Dual 4-Stage Static Shift Register
TECHNICAL DATA
KK4015B
The KK4015B consists of two identical, independent, 4-stage serial-
input/parallel-output registers. Each register has independent CLOCK and
RESET inputs as well as a single serial DATA input. “Q” outputs are
available from each of the four stages on both registers. All register stages
are D-type, master-slave flip-flops. The logic level present at the DATA
input is transferred into the first register stage and shifted over one stage
at each positive-going clock transition. Resetting of all stages is
accomplished by a high level on the reset line. Register expansion to 8
stages using one KK4015B package, or to more than 8 stages using
additional KK4015B’s is possible.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
KK4015BN Plastic
KK4015BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=VCC
PIN 8= GND
FUNCTION TABLE
Inputs
Clock Data Reset
LL
HL
XL
X XH
Outputs
Q1 Qn
L Qn-1
H Qn-1
No change
LL
X = don’t care
1

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KK4015B pdf
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KK4015B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
EXPANDED LOGIC DIAGRAM
( 1/2 of the Device)
5

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