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PDF MAX1385 Data sheet ( Hoja de datos )

Número de pieza MAX1385
Descripción (MAX1385 / MAX1386) Dual RF LDMOS Bias Controllers
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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No Preview Available ! MAX1385 Hoja de datos, Descripción, Manual

19-4456; Rev 0; 2/09
www.DataSheet4EUV.cAAoLVmUAAILTAIOBNLEKIT
Dual RF LDMOS Bias Controllers
with I2C/SPI Interface
General Description
The MAX1385/MAX1386 set and control bias conditions
for dual RF LDMOS power devices found in cellular
base stations. Each device includes a high-side cur-
rent-sense amplifier with programmable gains of 2, 10,
and 25 to monitor LDMOS drain current over the 20mA
to 5A range. Two external diode-connected transistors
monitor LDMOS temperatures while an internal temper-
ature sensor measures the local die temperature of the
MAX1385/MAX1386. A 12-bit ADC converts the pro-
grammable-gain amplifier (PGA) outputs, external/inter-
nal temperature readings, and two auxiliary inputs.
The two gate-drive channels, each consisting of 8-bit
coarse and 10-bit fine DACs and a gate-drive amplifier,
generate a positive gate voltage to bias the LDMOS
devices. The MAX1385 includes a gate-drive amplifier
with a gain of 2 and the MAX1386 gate-drive amplifier
provides a gain of 4. The 8-bit coarse and 10-bit fine
DACs allow up to 18 bits of resolution. The MAX1385/
MAX1386 include autocalibration features to minimize
error over time, temperature, and supply voltage.
The MAX1385/MAX1386 feature an I2C/SPI™-compatible
serial interface. Both devices operate from a 4.75V to
5.25V analog supply (3.2mA supply current), a 2.7V to
5.25V digital supply (3.1mA supply current), and a 4.75V
to 11.0V gate-drive supply (4.5mA supply current). The
MAX1385/MAX1386 are available in a 48-pin thin QFN
package.
Applications
RF LDMOS Bias Control in Cellular Base Stations
Industrial Process Control
Features
Integrated High-Side Drain Current-Sense PGA
with Gain of 2, 10, or 25
±0.5% Accuracy for Sense Voltage Between 75mV
and 250mV
Full-Scale Sense Voltage of 100mV with Gain of 25
Full-Scale Sense Voltage of 250mV with Gain of 10
Common-Mode Range of 5V to 30V Drain Voltage
for LDMOS
Adjustable Low Noise 0 to 5V, 0 to 10V Output
Gate-Bias Voltage Ranges with ±10mA Gate Drive
Fast Clamp to 0V for LDMOS Protection
8-Bit DAC Control of Gate-Bias Voltage
10-Bit DAC Control of Gate-Bias Offset with
Temperature
Internal Die Temperature Measurement
External Temperature Measurement by Diode-
Connected Transistor (2N3904)
Internal 12-Bit ADC Measurement of Temperature,
Current, and Voltages
Selectable I2C-/SPI-Compatible Serial Interface
400kHz/1.7MHz/3.4MHz I2C-Compatible Control
for Settings and Data Measurement
16MHz SPI-Compatible Control for Settings
and Data Measurement
Internal 2.5V Reference
Three Address Inputs to Control Eight Devices in
I2C Mode
Ordering Information/Selector Guide
PART
TEMP RANGE
MAX1385AETM+**
-40°C to +85°C
MAX1385BETM+
-40°C to +85°C
MAX1386AETM+**
-40°C to +85°C
MAX1386BETM+**
-40°C to +85°C
*EP = Exposed pad.
**Future product—contact factory for availability.
+Denotes a lead(Pb)-free/RoHS-compliant package.
PIN-PACKAGE
48 Thin QFN-EP*
48 Thin QFN-EP*
48 Thin QFN-EP*
48 Thin QFN-EP*
TEMP ERROR (°C)
±1
±2
±1
±2
VGATE (V)
5
5
10
10
Pin Configuration and Typical Operating Circuit (I2C Mode)
appear at end of data sheet.
SPI is a trademark of Motorola, Inc.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX1385 pdf
www.DataSheet4U.com
Dual RF LDMOS Bias Controllers
with I2C/SPI Interface
ELECTRICAL CHARACTERISTICS (continued)
(GATEVDD = +5.5V for the MAX1385, GATEVDD = +11V for the MAX1386, AVDD = DVDD = +5V, external VREFADC = +2.5V, external VREF-
DAC = +2.5V, CREF = 0.1µF, unless otherwise noted. TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
Capacitive Bypass at REF
Power-Supply Rejection Ratio
EXTERNAL REFERENCE
PSRR AVDD = +5V ±5%
REFADC Input Voltage Range
REFADC Input Current
VREFADC
IREFADC
Limited code test
VREF = 2.5V, fSAMPLE = 174ksps
Acquisition/between conversions
REFDAC Input Voltage Range
REFDAC Input Current
VREFDAC (Note 9)
Static current when no DAC calibration
GATE-DRIVER COARSE-DAC DC ACCURACY
Resolution
NCDAC
Integral Nonlinearity
INLCDAC Measured at GATE; fine DAC set at full scale
Differential Nonlinearity
DNLCDAC Guaranteed monotonic
GATE-DRIVER FINE-DAC DC ACCURACY
Resolution
NFDAC
Integral Nonlinearity
INLFDAC
Measured at GATE; coarse DAC set at full
scale
Differential Nonlinearity
POWER SUPPLIES (Note 10)
DNLFDAC Guaranteed monotonic
Analog Supply Voltage
AVDD
Digital Supply Voltage
DVDD
Gate-Drive Supply Voltage
Analog Supply Current
Digital Supply Current
GATEVDD Supply Current
Shutdown Current (Note 11)
VGATEVDD
IAVDD
IDVDD
IGATEVDD
IPD
AVDD = 5V
DVDD = 2.7V to 5.25V
IAVDD
IDVDD
IVDDGATE
MIN
270
1.0
0.5
8
10
4.75
2.7
4.75
3
TYP MAX UNITS
nF
70 dB
60
±0.01
0.1
AVDD
80
±1
2.5
V
µA
V
µA
±0.15
±0.05
±1
±0.5
Bits
LSB
LSB
±0.25
±0.1
±4
±1
Bits
LSB
LSB
5.25
AVDD
+ 0.3
11.00
3.2 4
3.1 4.3
4.5 7
0.1 2
0.1 2
0.1 2
V
V
V
mA
mA
mA
µA
_______________________________________________________________________________________ 5

5 Page





MAX1385 arduino
www.DataSheet4U.com
Dual RF LDMOS Bias Controllers
with I2C/SPI Interface
Typical Operating Characteristics
(GATEVDD = +5.5V for the MAX1385, GATEVDD = +11V for the MAX1386, AVDD = DVDD = +5V, external VREFADC = +2.5V, external
VREFDAC = +2.5V, CREF = 0.1µF, TA = +25°C, unless otherwise noted.)
AVDD SUPPLY CURRENT
vs. AVDD VOLTAGE
4.0
3.9 AvPGA = 2
CMV = 12V
3.8 VSENSE = 100mV
3.7
3.6 TA = +85°C
3.5 TA = +25°C
3.4
3.3
TA = -40°C
3.2
3.1
3.0
4.7 4.8 4.9 5.0 5.1 5.2 5.3
AVDD (V)
DVDD SUPPLY CURRENT vs. DVDD VOLTAGE
4.00
3.75 AvPGA = 2
CMV = 12V
3.50 VSENSE = 100mV
3.25
TA = +85°C
TA = +25°C
TA = -40°C
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
2.7 3.2 3.7 4.2 4.7 5.2
DVDD (V)
GATEVDD SUPPLY CURRENT
vs. GATEVDD VOLTAGE
5.0
4.9
AvPGA = 2
CMV = 12V
4.8 VSENSE = 100mV TA = +85°C
4.7
4.6 TA = +25°C
4.5
4.4
4.3 TA = -40°C
4.2
4.1
4.0
4 5 6 7 8 9 10 11
GATEVDD (V)
12
TOTAL PGAOUT_ ERROR
vs. TEMPERATURE
0.150
0.125
0.100
0.075
AvPGA = 2
CMV = 12V
VSENSE = 100mV
0.050
0.025
0
TRACKING
ACQUISITION
-0.025
-0.050
-0.075
-0.100
-0.125
-0.150
-40 -25 -10 5 20 35 50 65 80
TEMPERATURE (°C)
TOTAL PGAOUT_ ERROR vs. VSENSE
0.50
AvPGA = 2
0.45 CMV = 12V
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0 250 500 750 1000 1250
VSENSE (mV)
TOTAL PGAOUT_ ERROR vs. VSENSE
0.5
AvPGA = 25
0 CMV = 12V
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
0
20 40 60 80 100
VSENSE (mV)
TOTAL PGAOUT_ ERROR
vs. COMMON-MODE VOLTAGE
0.10
0.09
AvPGA = 2
VSENSE = 100mV
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
5 10 15 20 25 30
COMMON-MODE VOLTAGE (V)
PGAOUT_ OFFSET VOLTAGE
vs. TEMPERATURE
200
150 AvPGA = 2
CMV = 12V
100 VSENSE = 100mV
50
ACQUISITION
0
-50 TRACKING
-100
-150
-200
-250
-300
-350
-400
-40 -25 -10 5 20 35 50 65
TEMPERATURE (°C)
80
VSENSE TRANSIENT RESPONSE
MAX1385/86 toc09
100mV/div
VSENSE
PGAOUT_
1V/div
10μs/div
______________________________________________________________________________________ 11

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