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PDF R2A20112SP Data sheet ( Hoja de datos )

Número de pieza R2A20112SP
Descripción Critical Conduction Mode Interleaved PFC Control IC
Fabricantes Renesas Technology 
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R2A20112SP/DD
Critical Conduction Mode Interleaved PFC Control IC
REJ03D0904-0200
Preliminary
Rev.2.00
Nov 13, 2007
Description
The R2A20112 controls a boost converter to provide a active power factor correction.
The R2A20112 adopts critical conduction mode for power factor correction and realizes high efficiency and a low
switching noise by zero current switching.
Interleaving function improve ripple current on input or output capacitor by 180 degrees phase shift.
The feedback loop open detection, two mode overvoltage protection, overcurrent protection are built in the R2A20112,
and can constitute a power supply system of high reliability with few external parts.
Features
Maximum Ratings
Supply voltage Vcc: 24 V
Operating junction temperature Tjopr: –40 to +150°C
Electrical characteristics
VREF output voltage VREF: 5.0 V ± 3%
UVLO operation start voltage VH: 10.5 V ± 0.7 V
UVLO operation shutdown voltage VL: 9.3 V ± 0.5 V
UVLO hysteresis voltage Hysuvl: 1.2 V ± 0.5 V
Functions
Boost converter control with critical conduction mode
Interleaving control
Two mode overvoltage protection
Mode1: Dynamic OVP corresponding to a voltage rise by load change
Mode2: Static OVP corresponding to overvoltage in stable
Feedback loop open detection
Master and Slave independence overcurrent protection
280 µs restart timer
Package lineup: Pb-free SOP-16/DILP-16
REJ03D0904-0200 Rev.2.00 Nov 13, 2007
Page 1 of 7

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R2A20112SP pdf
R2A20112SP/DD
www.DaEtalSehceettr4iUc.caolmCharacteristics (cont.)
(Ta = 25°C, Vcc = 12 V, RT = 22 k, OCP = GND, CRAMP = 680 pF, RZCD-GND = 51 k, FB = COMP)
Item
Symbol
Min Typ Max Unit
Test Conditions
Error
amplifier
Feedback voltage
Input bias current
Vfb
Ifb
2.40 2.50 2.60
–0.5 0
0.5
V FB-COMP short, RAMP = 0 V
µA Measured pin: FB
Open loop gain
Av
— 60 — dB *1
Upper clamp voltage
Vclamp-comp
8.0
9.1 10.6
V FB = 2.0 V, COMP: Open
Low voltage
Vl-comp
— 0.1 0.3
V FB = 3.0 V, COMP: Open
Source current
Isrc-comp
— –120 —
µA FB = 1.5 V, COMP = 2.5 V
Sink current 1
Isnkcomp1
— 120 —
µA *1
Sink current 2
Isnkcomp2
— 300 —
µA FB = 3.5 V, COMP = 2.5 V
Transconductance
gm
150 200 290
µs FB = 2.45 V 2.55 V,
COMP = 2.5 V
RAMP
RAMP charge current
Ic-ramp
130 150 170
µA RAMP = 0 V to 7 V
RAMP discharge current
Id-ramp
7 16 29 mA FB = 1 V, COMP = 2 V,
RAMP = 0 V to 1.5 V to 1 V
Low voltage
Vl-ramp
— 17 200 mV FB = 1 V, COMP = 3 V,
RAMP = 0 V to 2.5 V to open
Isink = 100 µA
Zero
current
detector
Upper clamp voltage
Lower clamp voltage
ZCD low threshold voltage
Vzcdh
Vzcdl
Vzcd_lo
5.8
0.3
1.05
6.4
0.8
1.50
7.0
1.3
1.75
V Isource = –3 mA
V Isink = 3 mA
V *1
ZCD hysteresis
Hyszcd
180 300 390 mV *1
Input bias current
Izcd
–1 — 1 µA 1.2 V < Vzcd < 5 V
Slave
control
Phase delay
On time ratio
Phase
Ton-ratio
160 180 200 deg. *1, *2
–5 — 5 % *1, *2
Restart Restart time delay
Tstart
210 280 350
µs Cramp = 3300 pF
FB = 2.0 V, COMP = 5 V
Note: 1. Design spec.
2.
Tperiod (25 µs)
GD-M
Ton-m
(12.5 µs)
GD-S
Tdelay
Ton-s
Phase =
Tdelay
Tperiod
× 360 [deg.]
Ton-ratio =
1–
Ton-s
Ton-m
× 100 [%]
REJ03D0904-0200 Rev.2.00 Nov 13, 2007
Page 5 of 7

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