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Número de pieza | FAN3100 | |
Descripción | Low-Side Gate Driver | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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April 2008
FAN3100
Single 2A High-Speed, Low-Side Gate Driver
Features
3A Peak Sink/Source at VDD = 12V
4.5 to 18V Operating Range
2.5A Sink / 1.8A Source at VDD = 6V
Dual-Logic Inputs Allow Configuration as
Non-Inverting or Inverting with Enable Function
Internal Resistors Turn Driver Off If No Inputs
13ns Typical Rise Time and 9ns Typical Fall-Time
with 1nF Load
Choice of TTL or CMOS Input Thresholds
MillerDrive™ Technology
Typical Propagation Delay Time Under 20ns with
Input Falling or Rising
6-Lead 2x2mm MLP or 5-Pin SOT23 Packages
Rated from –40°C to 125°C Ambient
Applications
Switch-Mode Power Supplies
High-Efficiency MOSFET Switching
Synchronous Rectifier Circuits
DC-to-DC Converters
Motor Control
Description
The FAN3100 2A gate driver is designed to drive an N-
channel enhancement-mode MOSFET in low-side
switching applications by providing high peak current
pulses during the short switching intervals. The driver is
available with either TTL (FAN3100T) or CMOS
(FAN3100C) input thresholds. Internal circuitry provides
an under-voltage lockout function by holding the output
low until the supply voltage is within the operating
range. The FAN3100 delivers fast MOSFET switching
performance, which helps maximize efficiency in high-
frequency power converter designs.
FAN3100 drivers incorporate MillerDrive™ architecture
for the final output stage. This bipolar-MOSFET
combination provides high peak current during the
Miller plateau stage of the MOSFET turn-on / turn-off
process to minimize switching loss, while providing rail-
to-rail voltage swing and reverse current capability.
The FAN3100 also offers dual inputs that can be
configured to operate in non-inverting or inverting mode
and allow implementation of an enable function. If one
or both inputs are left unconnected, internal resistors
bias the inputs such that the output is pulled low to hold
the power MOSFET off.
The FAN3100 is available in a lead-free finish 2x2mm
6-lead Molded Leadless Package (MLP), for smallest
size with excellent thermal performance, or industry-
standard 5-pin SOT23.
Functional Pin Configurations
Figure 1. 2x2mm 6-Lead MLP (Top View)
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.1
Figure 2. SOT23-5 (Top View)
www.fairchildsemi.com
1 page www.DataSheet4U.com
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VDD
VIN
VOUT
TL
TJ
TSTG
ESD
VDD to PGND
Voltage on IN+ and IN- to GND, AGND, or PGND
Voltage on OUT to GND, AGND, or PGND
Lead Soldering Temperature (10 seconds)
Junction Temperature
Storage Temperature
Electrostatic Discharge
Protection Level
Human Body Model, JEDEC JESD22-A114
Charged Device Model, JEDEC JESD22-C101
Min.
Max. Unit
-0.3 20.0 V
GND - 0.3 VDD + 0.3
GND - 0.3 VDD + 0.3
+260
V
V
ºC
+150
ºC
-65
+150
ºC
4 kV
750 V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VDD Supply Voltage Range
VIN Input Voltage IN+, IN-
TA Operating Ambient Temperature
Min.
4.5
0
-40
Max.
18.0
VDD
+125
Unit
V
V
ºC
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.1
5
www.fairchildsemi.com
5 Page www.DataSheet4U.com
Typical Performance Characteristics
Typical characteristics are provided at 25°C and VDD=12V unless otherwise noted.
Figure 26. Propagation Delay vs. Supply Voltage
Figure 27. Propagation Delay vs. Supply Voltage
Figure 28. Propagation Delay vs. Temperature
Figure 29. Propagation Delay vs. Temperature
Figure 30. Propagation Delay vs. Temperature
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.1
11
Figure 31. Propagation Delay vs. Temperature
www.fairchildsemi.com
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet FAN3100.PDF ] |
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