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PDF K6T2008S2A Data sheet ( Hoja de datos )

Número de pieza K6T2008S2A
Descripción 256K X 8 Bit Low Power And Low Voltage CMOS Static RAM
Fabricantes Samsung Semiconductor 
Logotipo Samsung Semiconductor Logotipo



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Document Title
256Kx8 bit Low Power and Low Voltage CMOS Static RAM
Preliminary
CMOS SRAM
Revision History
Revision No. History
0.0 Initial draft
Draft Data
April 27, 1998
Remark
Preliminary
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
Revision 0.0
April 1999

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K6T2008S2A pdf
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AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage :1.1V
Output load(see right) : CL=100pF+1TTL
CL=30pF+1TTL
AC CHARACTERISTICS(VCC=2.3~2.7V, TA=-40 to 85°C)
Parameter List
Symbol
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
tRC
tAA
tCO1, tCO2
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Preliminary
CMOS SRAM
CL1)
1. Including scope and jig capacitance
Speed Bins
85ns
100ns
Min Max Min Max
85 - 100 -
- 85 - 100
- 85 - 100
- 40 - 50
10 - 10 -
5- 5 -
0 25 0 30
0 25 0 30
10 - 15 -
85 - 100 -
70 - 80 -
0- 0 -
70 - 80 -
55 - 70 -
0- 0 -
0 25 0 30
35 - 40 -
0- 0 -
5- 5 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
VDR CS1Vcc-0.2V1)
Data retention current
IDR Vcc=2.5V, CS1Vcc-0.2V1)
Data retention set-up time
Recovery time
tSDR
tRDR
See data retention waveform
1. CS1Vcc-0.2V, CS2Vcc-0.2V(CS1 controlled) or CS20.2V(CS2 controlled)
Min Typ Max Unit
2.0 - 2.7 V
- - 10 µA
0- -
ms
5- -
Revision 0.0
April 1999

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