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PDF K6T2008V2A Data sheet ( Hoja de datos )
| Número de pieza | K6T2008V2A | |
| Descripción | 256Kx8 bit Low Power and Low Voltage CMOS Static RAM | |
| Fabricantes | Samsung semiconductor | |
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www.DataShKee6t4UT.c2om008V2A, K6T2008U2A Family
Document Title
256Kx8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0 Design target
1.0 Finalize
2.0 Revised
- Add FBGA type package
2.01
Errata correction
- Removed T’ TL Compatible’from Features
Draft Data
May 26, 1998
October 8, 1998
July 21, 1999
Remark
Advance
Final
Final
October 24, 2001
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
Revision 2.01
October 2001
1 page  
www.DataShKee6t4TU.c2o0m 08V2A, K6T2008U2A Family
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS( Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load(see right): CL=100pF+1TTL
CL=30pF+1TTL
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (K6T2008V2A Family: VCC=3.0~3.6V, K6T2008U2A Family: VCC=2.7~3.3V
Commercial Product: TA=0 to 70°C, Industrial Product: TA=-40 to 85°C)
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO1, tCO2
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
70ns
Min Max
70 -
- 70
- 70
- 35
10 -
5-
0 25
0 25
10 -
70 -
60 -
0-
60 -
55 -
0-
0 25
30 -
0-
5-
Speed Bins
85ns
Min Max
85 -
- 85
- 85
- 40
10 -
5-
0 25
0 25
15 -
85 -
70 -
0-
70 -
60 -
0-
0 30
35 -
0-
5-
100ns
Min Max
100 -
- 100
- 100
- 50
10 -
5-
0 30
0 30
15 -
100 -
80 -
0-
80 -
70 -
0-
0 30
40 -
0-
5-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
VDR CS1≥Vcc-0.2V1)
Data retention current
IDR Vcc=3.0V, CS1≥Vcc-0.2V1)
Data retention set-up time
Recovery time
tSDR
tRDR
See data retention waveform
1. CS1≥Vcc-0.2V, CS2≥Vcc-0.2V(CS1 controlled) or CS2≤0.2V(CS2 controlled)
2. Industrial Products = 15µA
Min Typ Max Unit
2.0 - 3.6 V
- 0.2 102) µA
0 - - ms
5- -
Revision 2.01
October 2001
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet K6T2008V2A.PDF ] | |
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