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PDF PCA9675 Data sheet ( Hoja de datos )
| Número de pieza | PCA9675 | |
| Descripción | Remote 16-bit I/O expander | |
| Fabricantes | NXP Semiconductors | |
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PCA9675
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
Rev. 01 — 1 February 2007
Product data sheet
1. General description
The PCA9675 provides general purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plus
family.
The PCA9675 is a drop in upgrade for the PCF8575 providing higher Fast-mode Plus
(Fm+) I2C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
dimming of LEDs, higher I2C-bus drive (30 mA versus 3 mA) so that many more devices
can be on the bus without the need for bus buffers, higher total package sink capacity
(400 mA versus 100 mA) that supports having all 25 mA LEDs on at the same time and
more device addresses (64 versus 8) are available to allow many more devices on the bus
without address conflicts.
The device consists of a 16-bit quasi-bidirectional port and an I2C-bus interface. The
PCA9675 has a low current consumption and includes latched outputs with high current
drive capability for directly driving LEDs.
It also possesses an interrupt line (INT) which can be connected to the interrupt logic of
the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform
the microcontroller if there is incoming data on its ports without having to communicate via
the I2C-bus. The internal Power-On Reset (POR) or software reset sequence initializes
the I/Os as inputs.
2. Features
I 1 MHz I2C-bus interface
I Compliant with the I2C-bus Fast and Standard modes
I SDA with 30 mA sink capability for 4000 pF buses
I 2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
I 16-bit remote I/O pins that default to inputs at power-up
I Latched outputs with 25 mA sink capability for directly driving LEDs
I Total package sink capability of 400 mA
I Active LOW open-drain interrupt output
I 64 programmable slave addresses using 3 address pins
I Readable device ID (manufacturer, device type, and revision)
I Low standby current
I −40 °C to +85 °C operation
I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
1 page  
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PCA9675
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
terminal 1
index area
P00 1
P01 2
P02 3
P03 4
P04 5
P05 6
PCA9675BS
18 AD0
17 P17
16 P16
15 P15
14 P14
13 P13
terminal 1
index area
AD1 2
AD2 3
P00 4
P01 5
P02 6
P03 7
P04 8
P05 9
P06 10
P07 11
PCA9675BQ
23 SDA
22 SCL
21 AD0
20 P17
19 P16
18 P15
17 P14
16 P13
15 P12
14 P11
Transparent top view
002aab630
Fig 7. Pin configuration for HVQFN24
002aac269
Transparent top view
Fig 8. Pin configuration for DHVQFN24
6.2 Pin description
Table 2.
Symbol
INT
AD1
AD2
P00
P01
P02
P03
P04
P05
P06
P07
VSS
P10
P11
P12
P13
P14
P15
P16
P17
AD0
Pin description
Pin
SO, SSOP, TSSOP, HVQFN
DHVQFN
1 22
2 23
3 24
41
52
63
74
85
96
10 7
11 8
12[1]
9[1]
13 10
14 11
15 12
16 13
17 14
18 15
19 16
20 17
21 18
Description
interrupt output (active LOW)
address input 1
address input 2
quasi-bidirectional I/O 00
quasi-bidirectional I/O 01
quasi-bidirectional I/O 02
quasi-bidirectional I/O 03
quasi-bidirectional I/O 04
quasi-bidirectional I/O 05
quasi-bidirectional I/O 06
quasi-bidirectional I/O 07
supply ground
quasi-bidirectional I/O 10
quasi-bidirectional I/O 11
quasi-bidirectional I/O 12
quasi-bidirectional I/O 13
quasi-bidirectional I/O 14
quasi-bidirectional I/O 15
quasi-bidirectional I/O 16
quasi-bidirectional I/O 17
address input 0
PCA9675_1
Product data sheet
Rev. 01 — 1 February 2007
© NXP B.V. 2007. All rights reserved.
5 of 34
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PCA9675
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
Remark: The reading of the Device ID can be stopped anytime by sending a NACK
command.
Remark: If the master continues to ACK the bytes after the third byte, the PCA9675
rolls back to the first byte and keeps sending the Device ID sequence until a NACK
has been detected.
For the PCA9675, the Device ID is as shown in Figure 13.
manufacturer 0 0 0 0 0 0 0 0
part identification 0 0 0 0 0 0 1 0 0 1 1 0 0
category identification
feature identification
revision 0 0 0
002aab639
Fig 13. PCA9675 ID
device ID address
acknowledge from one
or several slave(s)
don't care
acknowledge from
slave to be identified
acknowledge from
slave to be identified
S 1 1 1 1 1 0 0 0 A A6 A5 A4 A3 A2 A1 A0 X A 1 1 1 1 1 0 0 1 A
START condition
I2C-bus slave address of
R/W
the device to be identified
acknowledge
from master
device ID address
R/W
acknowledge
from master
no acknowledge
from master
M7 M6 M5 M4 M3 M2 M1 M0 A C6 C5 C4 C3 C2 C1 C0 F5 A F4 P3 P2 P1 P0 R2 R1 R0 A P
manufacturer name
= 00000000
category identification
= 0000001
feature identification
= 001100
revision = 000
STOP
condition
002aab663
If more than 2 bytes are read, the slave device loops back to the first byte (manufacturer byte)
and keeps sending data until the master generates a ‘no acknowledge’.
Fig 14. Device ID field reading
PCA9675_1
Product data sheet
Rev. 01 — 1 February 2007
© NXP B.V. 2007. All rights reserved.
11 of 34
11 Page | ||
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| PDF Descargar | [ Datasheet PCA9675.PDF ] | |
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