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PDF XRT86VX38 Data sheet ( Hoja de datos )

Número de pieza XRT86VX38
Descripción T1/E1/J1 Framer/LIU Combo
Fabricantes Exar Corporation 
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XRT86VX38
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REV. 1.0.1
GENERAL DESCRIPTION
The XRT86VX38 is an eight-channel 1.544 Mbit/s or
2.048 Mbit/s DS1/E1/J1 framer and Long-haul/Short-
hual LIU integrated solution featuring R3 technology
(Relayless, Reconfigurable, Redundancy) and BITS
Timing element. The physical interface is optimized
with internal impedance, and with the patented pad
structure, the XRT86VX38 provides protection from
power failures and hot swapping.
The XRT86VX38 contains an integrated DS1/E1/J1
framer and LIU which provide DS1/E1/J1 framing and
error accumulation in accordance with ANSI/ITU_T
specifications. Each framer has its own framing
synchronizer and transmit-receive slip buffers. The
slip buffers can be independently enabled or disabled
as required and can be configured to frame to the
common DS1/E1/J1 signal formats.
Each Framer block contains its own Transmit and
Receive T1/E1/J1 Framing function. There are 3
Transmit HDLC controllers per channel which
encapsulate contents of the Transmit HDLC buffers
into LAPD Message frames. There are 3 Receive
HDLC controllers per channel which extract the
payload content of Receive LAPD Message frames
from the incoming T1/E1/J1 data stream and write the
contents into the Receive HDLC buffers. Each framer
also contains a Transmit and Overhead Data Input
port, which permits Data Link Terminal Equipment
direct access to the outbound T1/E1/J1 frames.
Likewise, a Receive Overhead output data port
permits Data Link Terminal Equipment direct access
to the Data Link bits of the inbound T1/E1/J1 frames.
The XRT86VX38 fully meets all of the latest T1/E1/J1
specifications: ANSI T1/E1.107-1988, ANSI T1/
E1.403-1995, ANSI T1/E1.231-1993, ANSI T1/
E1.408-1990, AT&T TR 62411 (12-90) TR54016, and
ITU G-703, G.704, G706 and G.733, AT&T Pub.
43801, and ETS 300 011, 300 233, JT G.703, JT
G.704, JT G706, I.431. Extensive test and diagnostic
functions include Loop-backs, Boundary scan,
Pseudo Random bit sequence (PRBS) test pattern
generation, Performance Monitor, Bit Error Rate
(BER) meter, forced error insertion, and LAPD
unchannelized data payload processing according to
ITU-T standard Q.921.
Applications and Features (next page)
FIGURE 1. XRT86VX38 8-CHANNEL DS1 (T1/E1/J1) FRAMER/LIU COMBO
Local PCM
Highway
XRT86VX38
1 of 8-channels
Tx Serial
Clock
Tx Serial
Data In
Rx Serial
Clock
Rx Serial
Data Out
PRBS
Generator &
Analyser
External Data
Link Controller
Tx Overhead In
Rx Overhead Out
2-Frame
Slip Buffer
Elastic Store
Tx Framer
2-Frame
Slip Buffer
Elastic Store
Rx Framer
Performance
Monitor
HDLC/LAPD
Controllers
Tx LIU
Interface
LLB LB
Rx LIU
Interface
LIU &
Loopback
Control
TTIP
TRING
RTIP
RRING
8kHz sync
OSC
Back Plane
1.544-16.384 Mbit/s
Signaling &
Alarms
System (Terminal) Side
TxON
JTAG
DMA
Interface
Microprocessor
Interface
INT
Memory
D[7:0]
A[14:0]
3
P
Select
4
WR
ALE_AS
RD
RDY_DTACK
Intel/Motorola µP
Configuration , Control &
Status Monitor
1:2 Turns Ratio
1:1 Turns Ratio
RxLOS
Line Side
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

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XRT86VX38 pdf
www.DataShReEeVt4.U1..c0o.1m
XRT86VX38
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
256 BALL - FINE PITCH BALL GRID ARRAY (BOTTOM VIEW - SEE PIN LIST FOR DESCRIPTION)
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
OOOOOOOOOOOOOOOO A
OOOOOOOOOOOOOOOO B
OOOOOOOOOOOOOOOO C
OOOOOOOOOOOOOOOO D
OOOOOOOOOOOOOOOO E
OOOOOOOOOOOOOOOO F
OOOOOOOOOOOOOOOO G
OOOOOOOOOOOOOOOO H
OOOOOOOOOOOOOOOO J
OOOOOOOOOOOOOOOO K
OOOOOOOOOOOOOOOO L
OOOOOOOOOOOOOOOO M
OOOOOOOOOOOOOOOO N
OOOOOOOOOOOOOOOO P
OOOOOOOOOOOOOOOO R
OOOOOOOOOOOOOOOO T
5

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XRT86VX38 arduino
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TABLE 1: 329 BALL LIST
BY BALL NUMBER
PIN PIN NAME
T3 TTIP7
T4 TVDD7
T5 8KEXTOSC
T6 VDD18
T7 VDD
T8 RXSYNC7
T9 RXCASYNC7
T10 RXSYNC6
T11 TXSERCLK5
T12 RXSERCLK6
T13 TXMSYNC5
T14 RxSCLK5
T15 RXSERCLK5
T16 TXSYNC4
T17 RXSYNC4
T18 ACK0
T19 REQ0
U1 RRING6
U2 RVDD7
U3 TRING7
U4 VDD
U5 TXSERCLK7
U6 TXSIG7
U7 RXSERCLK7
U8 RxSCLK7
U9 RXSIG7
U10 TXSIG6
U11 RxSCLK6
U12 VSS
U13 TXSYNC5
U14 RXSYNC5
U15 RXLOS5
XRT86VX38
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
TABLE 1: 329 BALL LIST
BY BALL NUMBER
TABLE 1: 329 BALL LIST
BY BALL NUMBER
PIN PIN NAME
PIN PIN NAME
U16 TXMSYNC4
W10 RXCASYNC6
U17 RXCASYNC4
W11
VDD
U18 RXSIG4
W12
RXSER6
U19 RXLOS4
W13
TXSIG5
V1 VDD
W14
RXSIG5
V2 TGND7
W15
VDD
V3 RGND7
W16 RXCRCSYNC5
V4 RESET
W17
TXSER4
V5 E1OSCCLK
W18
RxSCLK4
V6 TXMSYNC7
W19
VSS
V7 RXLOS7
V8 RXSER7
V9 TXSYNC6
V10 RXCRCSYNC6
V11 RXLOS6
V12 RXSIG6
V13 TXSER5
V14 RXSER5
V15 RXCASYNC5
V16 TXSIG4
V17 TXSERCLK4
V18 RXSER4
V19 RXCRCSYNC4
W1 VSS
W2 RTIP7
W3 RRING7
W4 TXON
W5 T1OSCCLK
W6 TXSER7
W7 TXSYNC7
W8 TXSERCLK6
W9 TXSER6
8

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