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PDF FXL3SD206 Data sheet ( Hoja de datos )

Número de pieza FXL3SD206
Descripción Two-Port SDIO Mux/Demux Level-Shifting Voltage Translator
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FXL3SD206 Hoja de datos, Descripción, Manual

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March 2009
FXL3SD206
Level Shifting Voltage Translator
Two-Port SDIO MUX/DEMUX with Three Configurable Power
Supplies for SDIO Device Port Expansion
Features
ƒ Bi-Directional Interface between Two Levels:
1.65 to 3.6V
ƒ Fully Configurable: Inputs and Outputs Track VDD
ƒ Flexible and Programmable VDD of B and C Ports
ƒ Non-Preferential Power-up; either VDD Can Power
Up First
ƒ Output Remains in 3-State until Active VDD Level is
Reached
ƒ Output Switches to 3-state if either VDD is at GND
ƒ Power-off Protection
ƒ Bus-Hold on Data Input Eliminates the Need for
SDIO Pull-up Resistors
ƒ 2:1 MUX/DEMUX of SDIO Devices in 24-Terminal
Micro-MLP Package (2.5mm x 3.4mm)
ƒ Direction Control is Automatic
ƒ Power Switching Time (VDD_HI to VDD_LO or Reverse)
is Less than 1.7µs
ƒ 60Mbps Throughput
ƒ ESD Protection Exceeds:
‚ 12KV HBM (A, B, and C port I/O to GND)
(per JESD22-A114)
‚ 1KV CDM (per ESD STM5.3)
Applications
ƒ SDIO Devices
ƒ Cell Phone, PDA, Digital Camera, Portable GPS
Description
FXL3SD206 is a voltage translator with multiplexing and
de-multiplexing functions for SDIO devices. It is
designed for voltage translation over a wide range of
input and output levels, from 1.65V to 3.6V.
The multiplexing/de-multiplexing function of this device
allows expansion of a host SDIO interface to two SDIO
peripheral devices. When selected, each SDIO peripheral
can communicate with the host through the same host
interface. An alternative application allows two host
devices to interface with a single SDIO peripheral.
Port A is intended to connect to a host device and the
voltage level tracks the VDDA. Ports B and C are
intended to connect to peripheral devices. Peripheral
I/O voltage levels track either VDD_HI or VDD_LO as
determined by the VDD_SEL pin. During normal
operation, VDD_HI must be greater than or equal to
VDD_LO. The CH_SEL, VDD_SEL, and OE pins are
referenced to VDD_CON. Channel communication from
either Port A to Port B or Port A to Port C is controlled
by the CH_SEL pin.
The selected channel remains in 3-state until the VDD of
each side reaches an active level and the OE pin
reaches a valid high. Internal power-down circuitry
places the selected channel of the device in 3-state if
either side VDD removed.
The direction of data is controlled automatically by the
device. No direction control pin is required. The device
senses input signals on any port automatically and
transfers the data to the corresponding output.
Ordering Information
Part Number
Operating
Temperature Range
FXL3SD206UMX
-40 to +85°C
Eco
Status
Green
Package
24-Pin, Micro-MLP, Quad, .6mm Thick,
2.5mm x 3.4mm Body
Packing
Method
Tape & Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2009 Fairchild Semiconductor Corporation
FXL3SD206 • Rev. 1.0.0
www.fairchildsemi.com

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Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Conditions
VDD Supply Voltage
VI DC Input Voltage
VDDA, VDD_HI, VDD_LO, VDD_CON
Data Ports A, B, and C
Control Inputs (OE, CH_SEL, VDD_SEL)
Output 3-State
VO Output Voltage(2)
Output Active (Port A)
Output Active (Port B or C)
Output Active (Port B or C)
IIK
IOK
IOH/IOL
IDD
TSTG
DC Input Diode Current
DC Output Diode Current
VI<0V
VO<0V
VO>VCC
DC Output Source/Sink Current
DC VDD or Ground Current per Supply Pin
Storage Temperature Range
Note:
2. IO absolute maximum rating must be observed.
Min.
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-50
-65
Max.
4.6
4.6
4.6
4.6
VDDA+0.5
VDD_HI+0.5
VDD_LO+0.5
-50
-50
+50
+50
±100
+150
Unit
V
V
V
V
mA
mA
mA
mA
°C
Recommended Operating Conditions(3)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Conditions
Min.
VDD Power Supply Operating
VIN Input Voltage
VDDA, VDD_HI, VDD_LO, VDD_CON
VDD_HI VDD_LO(4)
Port A
Port B and C(5)
Port B and C(5)
1.65
0
0
0
TA Free Air Operation Temperature
dt/dV Minimum Input Edge Rate
Data Port A at VDDA=1.65 to 3.6V
Data Ports B and C at VDD_n=1.65 to 3.6V
OE, CH_SEL, VDD_SEL at
VDD_CON=1.65V to 3.6V
-40
Notes:
3. All unused inputs and input/outputs must be held at VDDn or GND.
4. During normal operation, VDD_HI must be greater than or equal to VDD_LO.
5. The input and output voltages of Ports B and C are determined by which VDD is selected.
Max.
3.60
VDDA
VDD_HI
VDD_LO
+85
10
10
10
Unit
V
V
°C
ns/V
© 2009 Fairchild Semiconductor Corporation
FXL3SD206 • Rev. 1.0.0
5
www.fairchildsemi.com

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Maximum Data Rate(16)
TA=-40°C to 85°C.
VDD_A
VDD_n=2.8V to 3.6V VDD_n=2.3V to 2.7V VDD_n=1.65V to 1.95V
Direction
Units
Min.
Min.
Min.
VDD_A=2.8 to 3.6V
VDD_A=2.3 to 2.7V
VDD_A=1.65 to 1.95V
A to B/C
B/C to A
A to B/C
B/C to A
A to B/C
B/C to A
100
100
100
100
80
80
100
100
100
100
80
80
80 Mbps
80
80 Mbps
80
60 Mbps
60
Note:
16. Maximum Data Rate is specified in megabits per second. See Figure 11. It is equivalent to two times the fTOGGLE
frequency, specified in megahertz. For example, 100Mbps is equivalent to 50MHZ.
Capacitance
TA=+25°C.
Symbol
Parameter
CIN
Input Capacitance
Control Pins (OE, VDD_SEL, CH_SEL)
CI/O
Input/Output Dn_A, CMD_A,CLK_A
Capacitance Dn_BC, CMD_B, CMD_C, CLK_BC
CPD Power Dissipation Capacitance
Conditions
Typical Units
VDD_CON=GND
VDD_A=VDD_n=3.3V, OE=VDD_A,
CH_SEL=VDD_A or GND
VDD_A=VDD_n=3.3V, VI=0V or
VDD, f=10MHZ
4.0
5.0
6.5
25
pF
pF
pF
© 2009 Fairchild Semiconductor Corporation
FXL3SD206 • Rev. 1.0.0
11
www.fairchildsemi.com

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