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Número de pieza | TC55NEM216ASTV77 | |
Descripción | (TC55NEM216ASTV55 / TC55NEM216ASTV77) MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TC55NEM216ASTV77 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
No Preview Available ! TC55NEM216ASTV55,70
www.DaTtaESNheTeAt4TUI.cVoEm TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55NEM216ASTV is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by
16 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.7 to
5.5 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of
3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1 µA standby
current (typ) when chip enable ( CE ) is asserted high or chip select (CS) is asserted low. There are three control
inputs. CE is used to select the device and for data retention control, and output enable ( OE ) provides fast
memory access. Data byte control pin ( LB , UB ) provides lower and upper byte access. This device is well suited to
various microprocessor system applications where high speed, low power and battery backup are required. And,
with a guaranteed operating extreme temperature range of −40° to 85°C, the TC55NEM216ASTV can be used in
environments exhibiting extreme temperature conditions. The TC55NEM216ASTV is available in a plastic 44-pin
thin-small-outline package (TSOP).
FEATURES
• Low-power dissipation
Operating: 15 mW/MHz (typical)
• Single power supply voltage of 2.7 to 5.5 V
• Power down features using CE
• Data retention supply voltage of 2.0 to 5.5 V
• Direct TTL compatibility for all inputs and outputs
• Wide operating temperature range of −40° to 85°C
• Standby Current (maximum): 20 µA
• Access Times (maximum):
TC55NEM216ASTV
55 70
Access Time
55 ns
70 ns
CE Access Time
55 ns
70 ns
OE Access Time
30 ns
35 ns
• Package:
TSOP II44-P-400-0.80
(Weight: g typ)
PIN ASSIGNMENT (TOP VIEW)
44 PIN TSOP
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
VDD
GND
I/O5
I/O6
I/O7
I/O8
R/W
A15
A14
A13
A12
A16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 A5
43 A6
42 A7
41 OE
40 UB
39 LB
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 GND
33 VDD
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 CS
27 A8
26 A9
25 A10
24 A11
23 A17
PIN NAMES
A0~A17 Address Inputs
CE Chip Enable
CS Chip Select
R/W Read/Write Control
OE Output Enable
LB , UB Data Byte Control
I/O1~I/O16 Data Inputs/Outputs
VDD
GND
Power
Ground
NC No Connection
2002-10-30 1/12
1 page TC55NEM216ASTV55,70
www.DaAtaCSheCetH4UA.cRomACTERISTICS AND OPERATING CONDITIONS
(Ta = −40° to 85°C, VDD = 5 V ± 10%)
READ CYCLE
SYMBOL
PARAMETER
tRC
tACC
tCO
tOE
tBA
tCOE
tOEE
tBE
tOD
tODO
tBD
tOH
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold Time
TC55NEM216ASTV
55 70
MIN MAX MIN MAX
55 70
55 70
55 70
30 35
55 70
55
00
55
25 30
25 30
25 30
10 10
UNIT
ns
WRITE CYCLE
TC55NEM216ASTV
SYMBOL
PARAMETER
55 70 UNIT
MIN MAX MIN MAX
tWC Write Cycle Time
55 70
tWP Write Pulse Width
40 50
tCW Chip Enable to End of Write
45 55
tBW Data Byte Control to End of Write
45 55
tAS Address Setup Time
tWR Write Recovery Time
00
ns
00
tODW
R/W Low to Output High-Z
25 30
tOEW
R/W High to Output Active
00
tDS Data Setup Time
25 30
tDH Data Hold Time
00
Note: tOD, tODO, tBD and tODW are specified in time when an output becomes high impedance, and are not judged depending on
an output voltage level.
AC TEST CONDITIONS
PARAMETER
Input pulse level
tR, tF
Timing measurements
Reference level
Output load
TEST CONDITION
0.4 V, 2.4 V
5 ns
1.5 V
1.5 V
100 pF + 1 TTL Gate
2002-10-30 5/12
5 Page www.DaPtaASCheKet4AUG.coEm DIMENSIONS
TC55NEM216ASTV55,70
Weight:
g (typ)
2002-10-30 11/12
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet TC55NEM216ASTV77.PDF ] |
Número de pieza | Descripción | Fabricantes |
TC55NEM216ASTV77 | (TC55NEM216ASTV55 / TC55NEM216ASTV77) MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS | Toshiba Semiconductor |
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