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PDF NCP362 Data sheet ( Hoja de datos )
| Número de pieza | NCP362 | |
| Descripción | USB Positive Overvoltage and Overcurrent Protection | |
| Fabricantes | ON Semiconductor | |
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NCP362www.DataSheet4U.com
USB Positive Overvoltage
and Overcurrent Protection
with TVS for VBUS and Low
Capacitance ESD Diodes for
Data
The NCP362 disconnects systems at its output when wrong VBUS
operating conditions are detected at its input. The system is positive
overvoltage protected up to +20 V, overcurrent protected up to
750 mA, and receives protection from ESD diodes for the high speed
USB data and VBUS lines. Thanks to an integrated PMOS FET, no
external device is necessary, reducing the system cost and the PCB
area of the application board.
The NCP362 is able to instantaneously disconnect the output from
the input if the input voltage exceeds the overvoltage threshold
OVLO. Thanks to an overcurrent protection, the integrated PMOS
turns off when the charge current exceeds the current limit (see
options in ordering information).
The NCP362 provides a negative going flag (FLAG) output, which
alerts the system that voltage, current or overtemperature faults have
occurred.
In addition, the device integrates ESD diodes for VBUS and data
lines which are IEC61000−4−2, level 4 compliant. The ESD diodes
for D+ and D− are compatible with high speed USB thanks to an ultra
low capacitance of 0.5 pF.
Features
• Overvoltage Protection up to 20 V
• Undervoltage and Overvoltage Lockout (UVLO/OVLO)
• Overcurrent Protection
• Transient Voltage Suppressor for VBUS Pin
• Ultra Low Capacitance ESD for Data Lines
• Alert FLAG Output and EN Enable Pin
• Thermal Shutdown
• Compliance to IEC61000−4−2 (Level 4)
• Compliance Machine Model and Human Body Model
• 10 Lead UDFN 2x2.5 mm Package
• This is a Pb−Free Device
Applications
• USB Devices
• Mobile Phones
• Peripheral
• Personal Digital Assistant
• MP3/MP4 Players
• TV and Set Top Boxes
© Semiconductor Components Industries, LLC, 2009
March, 2009 − Rev. 0
1
http://onsemi.com
MARKING
DIAGRAMS
UDFN10
CASE 517AV
XXXM
G
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
PIN CONNECTIONS
EN 1
GND 2
IN 3
VBUS TVS 4
GND 5
PAD1
GND
PAD2
GND
10 FLAG
9 OUT
8 GND
7 NC
6 NC
NCP362A Version
(VBUS TVS + OVP/OCP)
EN 1
GND 2
IN 3
NC 4
GND 5
PAD1
GND
PAD2
GND
10 FLAG
9 OUT
8 GND
7 D+
6 D−
NCP362B Version
(D+/− ESD low cap + OVP/OCP)
EN 1
GND 2
IN 3
VBUS TVS 4
GND 5
PAD1
GND
PAD2
GND
10 FLAG
9 OUT
8 GND
7 D+
6 D−
NCP362C Version
(VBUS TVS + D+/− ESD low cap + OVP/OCP)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
Q
Publication Order Number:
NCP362/D
1 page  
NCP362
www.DataESLheEeCt4TUR.cIComAL CHARACTERISTICS
(Min/Max limits values (−40°C < TA < +85°C) and Vin = +5.0 V. Typical values are TA = +25°C, unless otherwise noted.)
Characteristic
Symbol
Conditions
Min Typ
Max
Input Voltage Range
Undervoltage Lockout Threshold
Uvervoltage Lockout Hysteresis
Overvoltage Lockout Threshold
Overvoltage Lockout Hysteresis
Vin versus Vout Dopout
Overcurrent Limit
Supply Quiescent Current
Standby Current
Zero Gate Voltage Drain Current
FLAG Output Low Voltage
Vin
UVLO
UVLOhyst
OVLO
OVLOhyst
Vdrop
Ilim
Idd
Istd
IDSS
Volflag
Vin falls below UVLO threshold
Vin rises above OVLO threshold
Vin = 5 V, I charge = 500 mA
Vin = 5 V
No Load, Vin = 5.25 V
Vin = 5 V, EN = 1.2 V
VDS = 20 V, VGS = 0 V
Vin > OVLO
Sink 1 mA on FLAG pin
1.2 20
2.85 3.0 3.15
50 70 90
5.43 5.675 5.9
50 100 125
150 200
550 750 950
20 35
26 37
0.08
400
FLAG Leakage Current
FLAGleak
FLAG level = 5 V
EN Voltage High
Vih Vin from 3.3 V to 5.5 V
EN Voltage Low
Vil Vin from 3.3 V to 5.5 V
EN Leakage Current
ENleak
EN = 5.5 V or GND
TIMINGS
Start Up Delay
ton From Vin > UVLO to Vout = 0.8xVin, See Fig 3 & 9
FLAG going up Delay
tstart From Vin > UVLO to FLAG = 1.2 V, See Fig 3 & 10
Output Turn Off Time
toff From Vin > OVLO to Vout ≤ 0.3 V, See Fig 4 & 11
Vin increasing from 5 V to 8 V at 3 V/ms.
Alert Delay
tstop From Vin > OVLO to FLAG ≤ 0.4 V, See Fig 4 & 12
Vin increasing from 5 V to 8 V at 3 V/ms
Disable Time
tdis From EN 0.4 to 1.2V to Vout ≤ 0.3 V, See Fig 5 & 13
Vin = 4.75 V.
Thermal Shutdown Temperature
Tsd
Thermal Shutdown Hysteresis
Tsdhyst
ESD DIODES (TA = 25°C, unless otherwise noted)
Capacitance (Note 7)
Pin VBUS TVS
Pins D+ & D−
C
1.2
5.0
0.55
170
4.0 15
3.0
0.7 1.5
1.0
3.0
150
30
30
0.5 0.9
Clamping Voltage (Notes 5, 6, 7)
Pin VBUS TVS
Pins D+ & D−
Working Peak Reverse Voltage
(Note 7)
Pin VBUS TVS
Pins D+ & D−
VC
VRWM
@ IPP = 5.9 A
@ IPP = 1.0 A
23.7
9.8
12
5.0
Maximum Reverse Leakage
Current
IR
@ VRWM
1.0
Breakdown Voltage (Note 4)
Pin VBUS TVS
Pins D+ & D−
VBR
@ IT = 1.0 mA
13.5
5.4
4. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.
5. Surge current waveform per Figure 28 in ESD paragraph.
6. For test procedures see Figures 26 and 27: IEC61000−4−2 spec, diagram of ESD test setup and Application Note AND8307/D.
7. ESD diode parameters are guaranteed by design.
Unit
V
V
mV
V
mV
mV
mA
mA
mA
mA
mV
nA
V
V
nA
ms
ms
ms
ms
ms
°C
°C
pF
V
V
mA
V
http://onsemi.com
5
5 Page 
NCP362
www.DatOaSpheereatt4iUo.ncom
NCP362 provides overvoltage protection for positive
voltage, up to 20 V. A PMOS FET protects the systems
(i.e.: VBUS) connected on the Vout pin, against positive
overvoltage. The Output follows the VBUS level until
OVLO threshold is overtaken.
Undervoltage Lockout (UVLO)
To ensure proper operation under any conditions, the
device has a built−in undervoltage lock out (UVLO)
circuit. During Vin positive going slope, the output remains
disconnected from input until Vin voltage is above 3.0 V
nominal. The FLAG output is pulled to low as long as Vin
does not reach UVLO threshold. This circuit has a 70 mV
hysteresis to provide noise immunity to transient condition.
Vin (V)
20 V
OVLO
UVLO
0
Vout
OVLO
UVLO
0
Figure 24. Output Characteristic vs. Vin
Overvoltage Lockout (OVLO)
To protect connected systems on Vout pin from
overvoltage, the device has a built−in overvoltage lock out
(OVLO) circuit. During overvoltage condition, the output
remains disabled until the input voltage exceeds 6.0 V.
FLAG output is tied to low until Vin is higher than
OVLO. This circuit has a 100 mV hysteresis to provide
noise immunity to transient conditions.
Overcurrent Protection (OCP)
The NCP362 integrates overcurrent protection to
prevent system/battery overload or defect. The current
limit threshold is internally set at 750 mA. This value can
be changed from 150 mA to 750 mA by a metal tweak,
please contact your ON Semiconductor representative for
availability. During current fault, the internal PMOS FET
is automatically turned off (5 ms) if the charge current
exceeds Ilim. NCP362 goes into turn on and turn off mode
as long as defect is present. The internal ton delay (4 ms
typical) allows limiting thermal dissipation. The Flag pin
goes to low level when an overcurrent fault appears. That
allows the microcontroller to count defect events and turns
off the PMOS with EN pin.
Vout
Ilimit I
t
toff
Overcurrent
ton
Retrieve normal
operation
t
Figure 25. Overcurrent Event Example
FLAG Output
NCP362 provides a FLAG output, which alerts external
systems that a fault has occurred.
This pin is tied to low as soon as: 1.2 V < Vin < UVLO,
Vin > OVLO, Icharge > Ilimit, TJ > 150°C. When NCP362
recovers normal condition, FLAG is held high. The pin is
an open drain output, thus a pull up resistor (typically 1 MW
− Minimum 10 kW) must be provided to VCC. FLAG pin is
an open drain output.
EN Input
To enable normal operation, the EN pin shall be forced
to low or connected to ground. A high level on the pin
disconnects OUT pin from IN pin. EN does not overdrive
an OVLO or UVLO fault.
Internal PMOS FET
The NCP362 includes an internal PMOS FET to protect
the systems, connected on OUT pin, from positive
overvoltage. Regarding electrical characteristics, the
RDS(on), during normal operation, will create low losses on
Vout pin, characterized by Vin versus Vout dropout.
http://onsemi.com
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet NCP362.PDF ] | |
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