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PDF DS2250 Data sheet ( Hoja de datos )

Número de pieza DS2250
Descripción Soft Microcontroller Module
Fabricantes Dallas Semiconductor 
Logotipo Dallas Semiconductor Logotipo



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DS2250(T)
DS2250(T)
Soft Microcontroller Module
FEATURES
8–bit 8051 compatible microcontroller adapts to task–
at–hand:
– 8K, 32K, or 64K bytes of nonvolatile RAM for
program and/or data memory storage
– Initial downloading of software in end system
via on–chip serial port
– Capable of modifying its own program and/or
data memory in end use
High–reliability operation:
– Maintains all nonvolatile resources for 10 years
in the absence of VCC
– Power–fail reset
– Early warning power–fail interrupt
– Watchdog timer
Software Security Feature:
– Executes encrypted software to prevent unau-
thorized disclosure
On–chip, full–duplex serial I/O ports
Two on–chip timer/event counters
32 parallel I/O lines
Compatible with industry standard 8051 instruction
set
Permanently Powered real time clock
PIN ASSIGNMENT
1 20 21
40-PIN SIMM
40
DESCRIPTION
The DS2250(T) Soft Microcontroller Module is a fully
8051 compatible 8–bit CMOS microcontroller that offers
“softness” in all aspects of its application. This is ac-
complished through the comprehensive use of nonvola-
tile technology to preserve all information in the ab-
sence of system VCC. The internal program/data
memory space is implemented using 8K, 32K, or 64K
bytes of nonvolatile CMOS SRAM. Furthermore, inter-
nal data registers and key configuration registers are
also nonvolatile. An optional real time clock gives per-
manently powered timekeeping. The clock keeps time
to a hundredth of a second using an on–board crystal.
All nonvolatile memory and resources are maintained
for over 10 years at room temperature in the absence of
power.
ECopyright 1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
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DS2250 pdf
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DS2250(T)
PIN DESCRIPTION
4, 6, 8, 10, P0.0–P0.7. General purpose I/O Port 0. This port is open–drain and can not drive a logic 1.
12, 14, 16, 18 It requires external pull–ups. Port 0 is also the multiplexed Expanded Address/Data bus.
When used in this mode, it does not require pull–ups.
2 VCC + – 5 volts.
INSTRUCTION SET
The DS2250(T) executes an instruction set which is ob-
ject code compatible with the industry standard 8051
microcontroller. As a result, software development
packages which have been written for the 8051 are
compatible with the DS2250(T), including cross–as-
semblers, high–level language compilers, and debug-
ging tools. Note that the DS2250(T) is functionally iden-
tical to the DS5000(T) except for package and the 64K
memory option.
A complete description for the DS2250(T) instruction
set is available in the User’s Guide section of the Secure
Microcontroller Data Book.
MEMORY ORGANIZATION
Figure 2 illustrates the address spaces which are ac-
cessed by the DS2250(T). As illustrated in the figure,
separate address spaces exist for program and data
memory. Since the basic addressing capability of the
machine is 16 bits, a maximum of 64 Kbytes of program
memory and 64 Kbytes of data memory can be ac-
cessed by the DS2250(T) CPU. The 8K or 32K byte
RAM area inside of the DS2250(T) can be used to con-
tain both program and data memory. A second 32K
RAM is available for data only.
The Real–time Clock (RTC) in the DS2250(T) is
reached in the memory map by setting a SFR bit. The
MCON.2 bit (ECE2) is used to select an alternate data
memory map. While ECE2=1, all MOVXs will be routed
to this alternate memory map. The real–time clock is a
serial device that resides in this area. A full description
of the RTC access and example software is given in the
User’s Guide section of the Secure Microcontroller Data
Book.
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DS2250 arduino
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DS2250(T)
AC CHARACTERISTICS
EXPANDED BUS MODE TIMING SPECIFICATIONS
# PARAMETER
SYMBOL
1 Oscillator Frequency
2 ALE Pulse Width
3 Address Valid to ALE Low
4 Address Hold After ALE Low
5 ALE Low to Valid Instr. In
@12 MHz
@16 MHz
1/tCLK
tALPW
tAVALL
tAVAAV
tALLVI
6 ALE Low to PSEN Low
7 PSEN Pulse Width
8 PSEN Low to Valid Instr. In @12 MHz
@16 MHz
tALLPSL
tPSPW
tPSLVI
9 Input Instr. Hold after PSEN Going High
10 Input Instr. Float after PSEN Going High
11 Address Hold after PSEN Going High
12 Address Valid to Valid Instr. In @12 MHz
@16 MHz
tPSIV
tPSIX
tPSAV
tAVVI
13 PSEN Low to Address Float
14 RD Pulse Width
15 WR Pulse Width
16 RD Low to Valid Data In
@12 MHz
@16 MHz
tPSLAZ
tRDPW
tWRPW
tRDLDV
17 Data Hold after RD High
18 Data Float after RD High
19 ALE Low to Valid Data In
@12 MHz
@16 MHz
tRDHDV
tRDHDZ
tALLVD
20 Valid Addr. to Valid Data In @12 MHz
@16 MHz
tAVDV
21 ALE Low to RD or WR Low
22 Address Valid to RD or WR Low
23 Data Valid to WR Going Low
24 Data Valid to WR High
@12 MHz
@16 MHz
tALLRDL
tAVRDL
tDVWRL
tDVWRH
25 Data Valid after WR High
26 RD Low to Address Float
27 RD or WR High to ALE High
tWRHDV
tRDLAZ
tRDHALH
(tA = 0°C to70°C; VCC = 5V + 5%)
MIN
MAX
UNITS
1.0
16 (–16)
MHz
2tCLK–40
tCLK –40
tCLK –35
tCLK –25
3tCLK –35
0
4tCLK –150
4tCLK–90
3tCLK –150
3tCLK –90
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCLK –8
0
tCLK –20
5tCLK –150
5tCLK –90
ns
ns
ns
ns
ns
6tCLK –100
6tCLK –100
0
5tCLK –165
5tCLK –105
ns
ns
ns
ns
ns
3tCLK –50
4tCLK –130
tCLK –60
7tCLK –150
7tCLK –90
tCLK –50
2tCLK –70
8CLK –150
8tCLK –90
9tCLK –165
9tCLK –105
3tCLK +50
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCLK –40
tCLK +50
ns
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