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PDF LF157 Data sheet ( Hoja de datos )

Número de pieza LF157
Descripción WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! LF157 Hoja de datos, Descripción, Manual

LF155-LF255-LF355
LF156-LF256-LF356
® LF157-LF257-LF357
WIDE BANDWIDTH
SINGLE J-FET OPERATIONAL AMPLIFIERS
. HIGH INPUT IMPEDANCE J-FET INPUT
STAGE
. HIGH SPEED J-FET OP-AMPs : up to 20MHz,
50V/µs
. OFFSET VOLTAGE ADJUSTMENT DOES NOT
DEGRADE DRIFT OR COMMON-MODE
. REJECTION AS IN MOST OF MONOLITHIC
AMPLIFIERS
INTERNAL COMPENSATION AND LARGE
DIFFERENTIAL INPUT VOLTAGECAPABILITY
(UP TO VCC+)
N
DIP8
(Plastic Package)
D
SO8
(Plastic Micropackage)
TYPICAL APPLICATIONS
. PRECISION HIGH SPEED INTEGRATORS
. FAST D/A AND CONVERTERS
. HIGH IMPEDANCE BUFFERS
. WIDEBAND, LOW NOISE, LOW DRIFT
AMPLIFIERS
. LOGARITHIMIC AMPLIFIERS
. PHOTOCELL AMPLIFIERS
. SAMPLE AND HOLD CIRCUITS
ORDER CODES
Part Number
LF355, LF356, LF357
LF255, LF256, LF257
LF155, LF156, LF157
Example : LF355N
Temperature
Range
0oC, +70oC
–40oC, +105oC
–55oC, +125oC
Package
ND
••
••
••
PIN CONNECTIONS (top view)
DE SC RI P TI O N
These circuits are monolithic J-FET input operational
amplifiers incorporating well matched, high voltage
J-FET on the same chip with standard bipolar transis-
tors.
This amplifiers feature low input bias and offset cur-
rents, low input offset voltage and input offset voltage
drift,coupledwith offsetadjust which doesnot degrade
drift or common-mode rejection.
The devices are also designed for high slew rate, wide
bandwidth,extremelyfastsettlingtime, lowvoltageand
current noise and a low 1/f noise level.
July 1998
18
27
36
45
1 - Offset Null 1
2 - Inverting input
3 - Non-inverting input
4 - VCC-
5 - Offset Null 2
6 - Output
7 - VCC+
8 - N.C.
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LF157 pdf
LF155 - LF156 - LF157
APPLICATION HINTS
The LF155, LF156, LF157 series are op amps with J-
FETinput transistors. TheseJFETs havelarge reverse
breakdown voltagesfromgatetosource or drain elimi-
natingtheneed of clamps across the inputs.Therefore
large differential input voltages can easily be accom-
modatedwithoutalarge increaseof inputcurrents. The
maximum differential input voltage is independent of
the supply voltage. However, neitherof thenegativein-
put voltagesshouldbe allowed to exceedthe negative
supply as this will cause large currents to flow which
can result in a destroyed unit. Exceeding the negative
common-modelimit on either inputwill causeareversal
of thephasetotheoutputandforce the amplifier output
to the correspondinghigh or lowstate. Exceedingthe
negativecommon-mode limit on bothinputs will force
the amplifier outputto a highstate.In neithercasedoes
a latch occur since raising the input back within the
common-mode range again puts the input stage and
thustheamplifierin a normal operatingmode. Exceed-
ingthepositive common-modelimit on asingle input will
not changethephase of the output however, if bothin-
putsexceedthe limit, theoutput of theamplifier will be
forcedto ahighstate.Theseamplifiers will operatewith
the common-mode input voltage equal to the positive
supply. In fact, the common-modevoltagecanex-
ceedthepositivesupplyby approximately 100mV inde-
pendentof supply volt-age and over thefull operat-
ingtemperaturerange.The positive suplly can there-
forebe used as a referenceonaninput as, forexample,
in a supply current monitor and/orlimiter. Precautions-
shouldbe taken to ensurethat thepowersupply forthe
integrated circuit never becomes re-versed in polarity
or that the unit is not inadvertentlyin-stalledbackwards
in a socket as an unilimited current surge throughthe
resulting forward diode within the IC couldcausefusin-
goftheinternalconductorsandresultin a destroyedunit.
Because these amplifiers are JFET rather than MOS-
FET input op amps they do not require special han-
dling.
Allof thebiascurrentsintheseamplifiersareset by FET
current sources. The drain currents for the amplifiers
are therefore essentially independent of supply volt-
ages.
As with most amplifiers, care should betakenwith lead
dress, components placement and supply decoupling
in order to ensure stability. For example, resistors from
the output to an input should be placed with the body
close to theinput to minimiz ”pickup”and maximize the
frequency of the feedback pole by minimizing the ca-
pacitancefromthe input to ground.
A feedback pole is createdwhen the feedbackaround
any amplifier is resistive. The parallel resistance and
capacitancefromthe input of thedevice(usually the in-
vertinginput) toacgroundsetthefrequencyofthepole. In
many instances the frequency of this pole is much
greaterthanthe expected3 dBfrequencyof the closed
loopgain and consequentlythereisnegligible effect on
stability margin. However, if the feedback pole is less
than approximately six time the expected 3 dB fre-
quencyaleadcapacitor should be placed from the out-
put to the input of the op amp. The value of that added
capacitor should be such that the RC time constant of
this capacitor and the resistance it parallels is greater
than or equal to the original feedback pole time con-
stant.
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LF155 - LF156 - LF157
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