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PDF NJU26150-19A Data sheet ( Hoja de datos )
| Número de pieza | NJU26150-19A | |
| Descripción | SRS Circle Surround II��/ QFP32-R1 | |
| Fabricantes | JRC | |
| Logotipo |  |
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NJU26150-19A
SRS Circle SurroundII5.1 &
Passive Matrix TruSurround HD/HD4XT Decoder
■ General Description
■Package
The NJU26150-19A is a digital signal processor that provides the function of
Circle SurroundII5.1 / TruSurround HD/HD4.
The NJU26150-19A processes the stereo matrix-encoded signal into spacious
sound of 5.1 channels by Circle SurroundII5.1. Also non matrix-encoded audio
signal can be processed into effective spacious sound.
The NJU26150-19A is also possible surround sound reproduction by Passive
Matrix TruSurround HD/HD4 technology, even if it is not only the independent
5.1ch speaker configuration but also the front speaker configuration.
NJU26150-19A
■ FEATURES
- Software
• 5.1-Channel signal outputs by SRS Circle Surround II 5.1
• Front Multi channel outputs by SRS TruSurround HD/ TruSurround HD4
- Input : Lt/Rt only TruSurround HD(2ch to 3.1ch outputs), TruSurround HD4(4ch to 5.1ch outputs)
• Mono-to-Stereo function
• LFE by SRS TruBass /TruBass-II
• SRS Focus and Dialog Clarity
• SRS Definition
• The sampling rate is fixed with 48KHz.
• Master Volume
• WatchDog Clock Output
- Hardware
• 24bit Fixed-point Digital Signal Processing
• Maximum System Clock Frequency : 38MHz Max.
• Digital Audio Interface
• Digital Audio Format
: 2 Input ports / 3 Output ports
: I2S 24bit, Left- justified, Right-justified, Output bit is fixed 16bits. BCK:32/64fs
• Master / Slave Mode
: Master Mode MCK 1/2 fclk, 1/3 fclk
ex. MCK = 384Fs(1/2) or MCK = 256Fs(1/3) at fclk=768Fs
• Power Supply
: 2.5V
• Input terminal
: 3.3V Input tolerant
• Package
• Host interface
: QFP32-R1 (Pb-Free)
: I2C bus (standard-mode/100kbps)
The detail hardware specification is described in the “ NJU26150 Series Hardware Data Sheet”.
Ver.2007-01-19
-1-
1 page  
www.DataSheet4U.com
■ Pin Configuration
SDI0
SDI1
TEST
LRI
BCKI
MCK
BCKO
LRO
NJU26150-19A
NJU26150-19A
16 SCL2/WDC
15 VSSC
14 VDDC
13 RESETb
12 VSSO
11 XO
10 XI
9 VDDO
■ Pin Description
Fig. 5 NJU26150-19A Pin Configuration
Table 1 Pin Description
No. Symbol I/O
Description
1 SDO2
O Audio Data Output 2
2 SDO1
O Audio Data Output 1
3 SDO0
4 SDA2
5 SCL
6 SDA
7 AD1
8 AD2
O Audio Data Output 0
I/O
Select I2C (For program down load)
This pin requires a pull-up resistance.
I I2C Clock
I/O
I2C I/O
This pin requires a pull-up resistance.
I I2C Address / Serial Input
I I2C Address / Serial Enable
9 VDDO
10 XI
-- OSC Power Supply +2.5V
I X’tal Clock Input
11 XO
O OSC Output
12 VSSO
13 RESETb
14 VDDC
-- OSC GND
I RESET (active Low)
-- Core Power Supply +2.5V
15 VSSC
-- Core GND
16
SCL2/WDC
O
I2C Clock(For program down load) /Clock
for Watch Dog Timer
* I : Input,
O : Output,
I/O: Bi-directional
No. Symbol I/O
Description
17
18
VDDC
-- Core Power Supply +2.5V
19
20
VSSC
-- Core GND
21 VDDR
22
23
24
VSSR
25 SDI0
26 SDI1
27 TEST
28 LRI
29 BCKI
30 MCK
31 BCKO
32 LRO
-- I/O Power Supply +2.5V
-- I/O GND
I Audio Data Input 0
I Audio Data Input 1
I Connect to GND
I LR Clock Input
I Bit Clock Input
O Master Clock Output
O Bit Clock Output
O LR Clock Output
Ver.2007-01-19
-5-
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet NJU26150-19A.PDF ] | |
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