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PDF FDMA1024NZ Data sheet ( Hoja de datos )

Número de pieza FDMA1024NZ
Descripción Dual N-Channel PowerTrench MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMA1024NZ Hoja de datos, Descripción, Manual

May 2009
FDMA1024NZ
Dual N-Channel PowerTrench® MOSFET
www.datasheet4u.com
20 V, 5.0 A, 54 m
Features
General Description
„ Max rDS(on) = 54 mat VGS = 4.5 V, ID = 5.0 A
„ Max rDS(on) = 66 mat VGS = 2.5 V, ID = 4.2 A
„ Max rDS(on) = 82 mat VGS = 1.8 V, ID = 2.3 A
„ Max rDS(on) = 114 mat VGS = 1.5 V, ID = 2.0 A
„ HBM ESD protection level = 1.6 kV (Note 3)
„ Low profile - 0.8 mm maximum - in the new package
MicroFET 2x2 mm
„ RoHS Compliant
„ Free from halogenated compounds and antimony
oxides
This device is designed specifically as a single package solution
for dual switching requirements in cellular handset and other
ultra-portable applications. It features two independent
N-Channel MOSFETs with low on-state resistance for minimum
conduction losses.
The MicroFET 2X2 package offers exceptional thermal
performance for its physical size and is well suited to linear mode
applications.
Applications
„ Baseband Switch
„ Loadswitch
„ DC-DC Conversion
PIN 1 S1 G1 D2
D1 D2
S1 1
G1 2
6 D1
5 G2
D1 G2 S2
MicroFET 2x2
D2 3
4 S2
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
20
±8
5.0
6.0
1.4
0.7
–55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
86 (Single Operation)
173 (Single Operation)
69 (Dual Operation)
151 (Dual Operation)
°C/W
Device Marking
024
Device
FDMA1024NZ
Package
MicroFET 2X2
Reel Size
7”
Tape Width
8 mm
Quantity
3000 units
©2009 Fairchild Semiconductor Corporation
FDMA1024NZ Rev.B3
1
www.fairchildsemi.com

1 page




FDMA1024NZ pdf
Typical Characteristics TJ = 25 °C unless otherwise noted
5
ID = 5 A
4
1000
Ciss
www.datasheet4u.com3
2
1
VDD = 8 V
VDD = 10 V
VDD = 12 V
0
012345
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
6
100 Coss
f = 1 MHz
Crss
VGS = 0 V
10
0.1 1 10 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. Capacitance vs Drain
to Source Voltage
10-2
VGS = 0 V
10-3
10-4
10-5 TJ = 125 oC
10-6
TJ = 25 oC
10-7
10-8
0 3 6 9 12 15
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 9. Gate Leakage Current vs Gate to Source
Voltage
10
100 us
1 ms
1
THIS AREA IS
LIMITED BY rDS(on)
0.1 SINGLE PULSE
TJ = MAX RATED
RθJA = 173 oC/W
TA = 25 oC
0.01
0.1
1
10 ms
100 ms
1s
10 s
DC
10 60
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 10. Forward Bias Safe Operating Area
100
10
1
0.3
10-3
VGS = 4.5 V
SINGLE PULSE
RθJA = 173 oC/W
TA = 25 oC
10-2
10-1
100
101
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
100
1000
©2009 Fairchild Semiconductor Corporation
FDMA1024NZ Rev.B3
5
www.fairchildsemi.com

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