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PDF FDMA1029PZ Data sheet ( Hoja de datos )

Número de pieza FDMA1029PZ
Descripción Dual P-Channel PowerTrench MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMA1029PZ Hoja de datos, Descripción, Manual

May 2006
FDMA1029PZ
www.datasheet4u.com
Dual P-Channel PowerTrench® MOSFET
General Description
This device is designed specifically as a single package
solution for the battery charge switch in cellular handset
and other ultra-portable applications. It features two
independent P-Channel MOSFETs with low on-state
resistance for minimum conduction losses. When
connected in the typical common source configuration,
bi-directional current flow is possible.
The MicroFET 2x2 package offers exceptional thermal
performance for its physical size and is well suited to
linear mode applications.
PIN 1
S1 G1 D2
Features
–3.1 A, –20V. RDS(ON) = 95 m@ VGS = –4.5V
RDS(ON) = 141 m@ VGS = –2.5V
Low profile – 0.8 mm maximum – in the new package
MicroFET 2x2 mm
RoHS Compliant
D1 D2
D1 G2 S2
MicroFET 2x2
S1 1
G1 2
D2 3
6 D1
5 G2
4 S2
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDS
VGS
ID
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
029
FDMA1029PZ
7’’
©2006 Fairchild Semiconductor Corporation
Ratings
–20
±12
–3.1
–6
1.4
0.7
–55 to +150
Units
V
V
A
W
°C
86 (Single Operation)
173 (Single Operation)
69 (Dual Operation)
151 (Dual Operation)
°C/W
Tape width
8mm
Quantity
3000 units
FDMA1029PZ Rev B (W)

1 page




FDMA1029PZ pdf
Typical Characteristics
www.datasheet4u.com10
8
ID = -3.1A
6
4
VDS = -5V
-15V
-10V
2
0
0 2 4 6 8 10 12 14
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
10 RDS(ON) LIMIT
100us
1ms
10ms
100ms
1 1s
10s
DC
VGS = -4.5V
0.1 SINGLE PULSE
RθJA = 173oC/W
TA = 25oC
0.01
0.1 1 10
-VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
1000
800
f = 1MHz
VGS = 0 V
600
Ciss
400
200
0
0
Crss
Coss
4 8 12 16
-VDS, DRAIN TO SOURCE VOLTAGE (V)
20
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
RθJA = 173°C/W
40 TA = 25°C
30
20
10
0
0.0001 0.001 0.01
0.1
1
10 100 1000
Figure 10. Single Pulse Maximum Power
Dissipation.
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1 1
t1, TIME (sec)
RθJA(t) = r(t) * RθJA
RθJA =173 °C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
10 100
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
1000
FDMA1029PZ Rev B (W)

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