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PDF LE28DW1621T Data sheet ( Hoja de datos )
| Número de pieza | LE28DW1621T | |
| Descripción | 16 Megabit FlashBank Memory | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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16 Megabit FlashBank Memory
LE28DW1621T-80T (Draft3)
FEATURES:
• Single 3.0-Volt Read and Write Operations
• Separate Memory Banks by Address Space
– Bank1: 4Mbit (256K x 16 / 512K x 8) Flash
– Bank2: 12Mbit (768K x 16 / 1536K x 8) Flash
– Simultaneous Read and Write Capability
• Superior Reliability
– Endurance: 100,000 Cycles (Erase Verify Mode)
10,000 Cycles
– Data Retention: 10 years
• Low Power Consumption
– Active Current, Read:
– Active Current, Read & Write:
– Standby Current:
– Auto Low Power Mode Current:
10 mA (typical)
30 mA (typical)
5µA (typical)
5µA (typical)
• Fast Write Operation
– Chip Erase + Program:
– Block Erase + Program:
– Sector Erase + Program:
• Fixed Erase, Program, Write Times
– Does not change after cycling
15 sec (typical)
500 ms (typical)
30 ms (typical)
• Read Access Time
– 80 ns
• Latched Address and Data
• End of Write Detection
– Toggle Bit / Data # Polling / RY/BY#
• Write Protection by WP# pin
• Erase Verify Mode
• Flash Bank: Two Small Erase Element Sizes
– 1K Words per Sector or 32K Words per Block
– Erase either element before Word Program
• CMOS I/O Compatibility
• Packages Available
– 48-Pin TSOP (12mm x 20mm)
• Continuous Hardware and Software Data
Protection (SDP)
1
Product Description
The LE28DW1621T consists of two memory banks, Bank1 is
a 256K x 16 bits or 512K x 8 sector mode flash EEPROM and
Bank2 is a 768K x 16 bits or 1536K x 8 sector mode flash
EEPROM, manufactured with SANYO's proprietary, high per-
formance FlashTechnology. The LE28DW1621T writes with a
3.0-volt-only power supply.
The LE28DW1621T is divided into two separate memory banks.
Bank1 contains 256 sectors of 1K words or 8 blocks of 32K
words, Bank2 contains 768 sectors of 1K words or 24 blocks of
32K words.
Any bank may be used for executing code while writing data to
a different bank. Each memory bank is controlled by separate
Bank selection address (A18,A19) lines.
The LE28DW1621T inherently uses less energy during Erase,
and Program than alternative flash technologies. The total
energy consumed is a function of the applied voltage, current,
and time of application. Since for any given voltage range, the
Flash technology uses less current to program and has a shorter
Erase time, the total energy consumed during any Erase or
Program operation is less than alternative flash technologies.
The Auto Low Power mode automatically reduces the active
read current to approximately the same as standby; thus,
providing an average read current of approximately 1 mA/MHz of
Read cycle time.
The Flash technology provides fixed Erase and Program times,
independent of the number of erase/program cycles that have
occurred. Therefore the system software or hardware does not
have to be modified or derated as is necessary with alternative
flash technologies, whose Erase and Program times increase
with accumulated erase/program cycles.
Device Operation
The LE28DW1621T operates as independent 4Megabit and
12Megabit Word Pogram, Sector Erase flash EEPROMs. Two
memory Banks are spareted by the address space.
The Bank1 is assigned as C0000h to FFFFFh, Bank2 is as-
signed as 00000h to BFFFFh.
All memory banks share common I/O lines, WE#, and OE#.
Memory bank selection is by bank select address(A19, A18).
WE# is used with SDP to control the Erase and Program
operation in each memory bank.
The LE28DW1621T provides the added functionality of being
able to simultaneously read from one memory bank while
erasing, or programming to one other memory bank. Once the
internally controlled Erase or Program cycle in a memory bank
has commenced, a different memory bank can be accessed for
read. Also, once WE# and CE# are high during the SDP load
sequence, a different bank may be accessed to read.
LE28DW1621T which selectes banks (A19, A18) by a address.
It can be used as a normal conventinal flash memory when
operats erase or program operation to only a bank at non-
concurrent operation.
The device ID cannot be accessed while any bank is writing,
erasing, or programming.
SANYO Electric Co.,Ltd. Semiconductor Company 1-1-11Sakata Oizumi Gunma Japan
The Flash Bank product family was jointly developed by SANYO and Sillicon Storage Technology,Inc.(SST),under SST's technology license. This preliminary specification is subject to change without notice.
R.1.20(4/27/2000) No.xxxx-1/20
1 page  
16 Megabit FlashBank Memory
LE28DW1621T-80T (Draft3)
5
Symbol
Pin Name
A19,A18
Bank Select address
A19-A0,A-1
A19-A15
A19-A10
Flash Bank addresses
Flash Bank Block addresses
Flash Bank Sector addresses
DQ15-DQ0 Data Input/Output
CE#
OE#
WE#
BYTE#
RY/BY#
WP#
VDD
Vss
Chip Enable
Output Enable
Write Enable
Byte selection
Ready / Busy output
Write Protect
Power Supply
Ground
NC No Connection
Table1: Pin Description
Function
To activate the Bank1 when both are high, to activate the Bank2 when
the other combination.
To provide Flash Bank address
To select a Flash Bank Block for erase
To select a Flash Bank Sector for erase
To output data during read cycle and receive input data during write
cycle. The outputs are in tristate when OE# is high or CE# is high.
To activate the Flash Bank when CE# is low.
To gate the data output buffers.
To control the write, erase or program operations.
To select a Byte mode when low, to select a Word mode when high
To output low when write, other case is High-Z
To execute Hardware write protect when low
To provide 3.0 volts supply.(2.7volts to 3.6 volts)
Unconnected Pins
Charge Pump
&
Vref.
Y-Decoder
Address Buffer
&
Data Latchs
A19-A0,A-1
CE#
OE#
WE#
WP#
RY/BY#
RESET#
BYTE#
Control Logic
X-Decoder
768Kx16
or
1536K x 8
Flash Bank2
DQ15-DQ0
256Kx16
or
512K x 8
Flash Bank1
I/O Buffers & Data Latches
Figure2-1: Functinaly Block Diagram
SANYO Electric Co.,Ltd. Semiconductor Company 1-1-15Sakata Oizumi Gunma Japan
R.1.20(4/27/2000) No.xxxx-5/20
5 Page 
16 Megabit FlashBank Memory
LE28DW1621T-80T (Draft3)
11
ADDRESS A19-A0
CE#
OE#
WE#
DQ15-DQ0
VIH
HIGH-Z
TRC
TAA
TCE
TOE
TOLZ
TCLZ
TOH
DATA VALID
Exsample for Word Mode, in Byte Mode A-1=Address Input
Figure 3: Read Cycle Timing Diagram
TOHZ
TCHZ
DATA VALID
HIGH-Z
28DW1621TS\F3_E
ADDRESS A19-A0
WE#
TAS
OE#
5555
TAH
TWP
2AAA
TWPH
5555
ADDR
INTERNAL PROGRAM OPERATION STARTS
TBP
TDH
TDS
CE#
DQ15-DQ0
TCEH
TCES
AA 55 A0 DATA
SW0
SW1
SW2
WORD
(ADDR/DATA)
Exsample for Word Mode, in Byte Mode A-1=Address Input
28DW1621TS\F4-1_E
Figure 4-1: WE# Controlled Word Program Cycle Timing Diagram
SANYO Electric Co.,Ltd. Semiconductor Company 1-1-11S1akata Oizumi Gunma Japan
R.1.20(4/27/2000) No.xxxx-11/20
11 Page | ||
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| PDF Descargar | [ Datasheet LE28DW1621T.PDF ] | |
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