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PDF PAM3130 Data sheet ( Hoja de datos )
| Número de pieza | PAM3130 | |
| Descripción | 3A Low Voltage-Low Dropout CMOS Regulator | |
| Fabricantes | Power Analog Micoelectronics | |
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Hay una vista previa y un enlace de descarga de PAM3130 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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PAM3130
3A Low Voltage-Low Dropout CMOS Regulator
Key Features
n Low-Dropout Regulator Supports Input
www.datasheVeto4ult.caogmes Down to 1.4V
n Output Voltage Available in 0.9V,1.0V, 1.2V,
1.5V, 1.8V, 2.5V,2.8V,2.85V,3.0V,3.3V
n Low Dropout Voltage:300mV@ 3A
n Stable with a Ceramic Output Capacitor
of 1.0uF or Higher
n Low Quiescent Current
n Current Limit
n Over Temperature Shutdown
n Short Circuit Current Protection
n Low Temperature Coefficient
n Standard TO-263,TO-220 and SOP-8
(Exposed Pad) Packages
n Pb-Free Package
Applications
General Description
The PAM3130 is a 3A CMOS LDO regulator that
features a low quiescent current, ultra low input,
output, and dropout voltages, as well as over
temperature protection. It is available in TO-263 ,
TO-220 and SOP-8(Exposed Pad) packages. The
fixed output voltage of the PAM3130 is set at the
factory and trimmed to ±2.0%. The PAM3130 is
stable with a ceramic output capacitor of 1.0uF
or higher.
This family of regulators can provide either a
stand-alone power supply solution or act as a post
regulator for switch mode power supplies. They
are particularly well suited for applications
requiring low input and output voltages.
n DSP, FPGA, and Microprocessor Power
Supplies
n 1.2V Core Voltage for DSPs
n SATA Power Supply
n LCD TV/ Monitors
n Wireless Devices
n Communication Devices
n Portable Electronics
n Post Regulator for SMPS
Typical Application
RP 10K
IN
VIN VOUT
PAM3130
CIN
4.7uF
GND
OUT
CO
2.2uF
IN PWRGD
VIN VOUT
PAM3130
EN SENSE
C1
4.7uF
GND
OUT
C2
2.2uF
Power Analog Microelectronics,Inc
www.poweranalog.com
1
08/2007
1 page  
PAM3130
3A Low Voltage-Low Dropout CMOS Regulator
Electrical Characteristic
VIN =VO+0.5V, TA=25 OC, CIN =4.7uF, CO=2.2uF, unless otherwise noted.
www.dPaatarsahmeeet4teu.rcsom
Symbol Test Conditions
MIN
Input Voltage Range
Output Voltage
Accuracy
VIN
Vo Io=100mA
Note 1
-2
Vo=0.9V
IO=500mA
Vo=1.0V
2.5V>Vo≥1.2V
Dropout Voltage
VDROP
Vo≥2.5V
Vo=0.9V
IO=3.0A
Vo=1.0V
2.5V>Vo≥1.2V
Vo≥2.5V
Short Circuit Current
Output Current
Quiescent Current
Ground Pin Current
ISC Vo < 0.3V
IO
IQ Io=0mA
IGND Io=1mA to 3.0A
Vo≤2.5V,Io=10mA
3.0
Line Regulation
LNR
VIN =Vo+0.5V to Vo+1.5V
Vo>2.5V,Io=10mA
Load Regulation
Over Temperature
Shutdown
LDR
OTS
VIN =3.3V to 3.6V
Io=1mA to 3.0A,VIN=Vo+0.5V
Over Temperature
Hysteresis
OTH
Temperature Coefficient TC
Power Supply Ripple
Rejection
PSRR
f=100Hz
Io=100mA, Vo=1.5V f=1KHz
f=10KHz
Output Noise
Vn f=10Hz to 100kHz
TYP
330
220
50
40
500
400
350
300
1.0
90
MAX
3.6
2
500
400
200
150
UNITS
V
%
mV
Note 2
150
1.0
A
A
uA
mA
0.5 1.0 %/V
0.5 2 %/A
150 ℃
50 ℃
40 ppm/℃
55
55 dB
35
40 uVrms
Note1: The minimum input voltage (V )IN(MIN) of the PAM3130 is determined by output voltage and dropout
voltage. The minimum input voltage is defined as:
V =V +VIN(MIN) O drop
Note 2: Output current is limited by PD, maximum IO=PD/(VIN(MAX)-VO).
Power Analog Microelectronics,Inc
www.poweranalog.com
5
08/2007
5 Page 
PAM3130
3A Low Voltage-Low Dropout CMOS Regulator
Application Information
The PAM3130 family of low-dropout (LDO)
wwwr.edgatuaslahetoetr4su.hcoamve several features that allow them to
apply to a wide range of applications. The family
operates with very low input voltage (1.4V) and low
dropout voltage (typically 300mV at full load),
making it an efficient stand-alone power supply or
post regulator for battery or switch mode power
supplies. The 3A output current make the PAM3130
family suitable for powering many microprocessors
and FPGA supplies. The PAM3130 family also has
low output noise (typically 40μVRMS with 2.2μF
output capacitor), making it ideal for use in telecom
equipment.
External Capacitor Requirements
A 2.2μF or larger ceramic input bypass capacitor,
connected between VIN and GND and located close
to the PAM3130, is required for stability. A 1.0uF
minimum value capacitor from VO to GND is also
required. To improve transient response, noise
rejection, and ripple rejection, an additional 10μF
or larger, low ESR capacitor is recommended at the
output. A higher value, low ESR output capacitor
may be necessary if large, fast-rise-time load
transients are anticipated and the device is located
several inches from the power source, especially if
the minimum input voltage of 1.4 V is used.
Regulator Protection
The PAM3130 features internal current limiting,
thermal protection and short circuit protection.
During normal operation, the PAM3130 limits
output current to about 4.5A. When current limiting
engages, the output voltage scales back linearly
until the over current condition ends. While current
limiting is designed to prevent gross device failure,
care should be taken not to exceed the power
dissipation ratings of the package. If the
temperature of the device exceeds 150°C, thermal-
protection circuitry will shut down. Once the device
has cooled down to approximately 50°C below the
high temp trip point, regulator operation resumes.
The short circuit current of the PAM3130 is about
1A when its output pin is shorted to ground.
Thermal Information
The amount of heat that an LDO linear regulator
generates is:
PD=(V -IN VO)IO.
All integrated circuits have a maximum
allowable junction temperature (TJ max) above
which normal operation is not assured. A system
designer must design the operating
environment so that the operating junction
temperature (TJ) does not exceed the maximum
junction temperature (TJ max). The two main
environmental variables that a designer can use
to improve thermal performance are air flow and
external heatsinks. The purpose of this
information is to aid the designer in determining
the proper operating environment for a linear
regulator that is operating at a specific power
level.
In general, the maximum expected power
(PD(max)) consumed by a linear regulator is
computed as:
( )PDmax= VI(avg)-VO (avg) ×IO (avg)+VI(avg)×I(Q)
(1)
Where:
l VI (avg) is the average input voltage.
l VO(avg) is the average output voltage.
l IO(avg) is the average output current.
l I(Q) is the quiescent current.
For most LDO regulators, the quiescent current
is insignificant compared to the average output
current; therefore, the term VI(avg) xI(Q) can be
neglected. The operating junction temperature
is computed by adding the ambient temperature
(TA) and the increase in temperature due to the
regulator' s power dissipation. The temperature
rise is computed by multiplying the maximum
expected power dissipation by the sum of the
thermal resistances between the junction and
the case (R )θJC , the case to heatsink (R )θCS , and
the heatsink to ambient (RθSA). Thermal
resistances are measures of how effectively an
object dissipates heat. Typically, the larger the
device, the more surface area available for
power dissipation so that the object 's thermal
resistance will be lower.
Power Analog Microelectronics,Inc
www.poweranalog.com
11
08/2007
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet PAM3130.PDF ] | |
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