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PDF FLF10 Data sheet ( Hoja de datos )

Número de pieza FLF10
Descripción High Density Flash Memory Card
Fabricantes White Electronic Designs Corporation 
Logotipo White Electronic Designs Corporation Logotipo



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No Preview Available ! FLF10 Hoja de datos, Descripción, Manual

PCMCIA Flash Memory Card
FLF10 Series
High Density FLASH Memory Card 32, 64, 96, 128, 160, 192 MEGABYTE
General Description
WEDC’s Flash memory cards - FLF10 Series - offer high density
linear Flash memory for code and data storage, high performance
www.datashedeits4ku.ecmomulation, mobile PC and embedded applications.
The WEDC FLF10 series is based on Intel’s Multi Level Cell
(MLC) Flash memory technology, providing high density Flash
components at a significantly lower cost per megabyte. MLC
technology allows for two bits of information to be stored in a single
cell. This leads to reduced die size and reduced cost per megabyte.
WEDC’s FLF10 series cards are built with Intel’s 128Mb memory
component, 28F128J3A, with a manufacturer/device ID of 89/18H.
The FLF10 series is available in densities of 32, 64, 96, 128, 160,
and 192MB.
WEDC’s FLF10 series provides densities from 32MB to 192MB, in
32MB increments. The cards up to the 64MB density operate in the
regular PCMCIA mode. The densities beyond the 64MB density
are implemented using a “paging scheme”, which is also supported
by the PCMCIA standard. By writing a page address to the
Configuration Option Register (address 4000H), an additional page
of memory can be accessed. The current FLF10 series supports
densities to 192MB: total of 3 pages: page 0 := 64MB, page 1 :=
64MB, and page 2 := 64MB.
The FLF10 series card operates in a wide, universal voltage range,
from 3V to 5V, allowing full “plug and play” functionality and
upgrade solutions in all mobile, battery powered applications.
Each memory component in the card also has a 128-bit Protection
Register, containing 64 bits of User Programmable OTP (One Time
Programmable) Cells. These cells can be programmed with a
numeric security measure, such as an electronic signature.
Features
Low cost, high density Linear Flash
Card
• Universal 3V to 5V operating range
providing full “plug and play”
exchangeability between different
systems
• Based on Intel 28F128J3A (MLC)
Components
• Fast Read Performance
- 250ns Maximum Access Time
- (200ns optional)
•PCMCIA compatible
- x8/ x16 Data Interface
• 32-Byte Write Buffer (per Memory
Device)
- 6µs per Byte Effective Write Time
•128-bit Protection Register (per Memory
Device)
-64-bit Unique Device Identifier
-64-bit User Programmable OTP
Cells
•Cross-Compatible Command Support
- Common Flash Interface (CFI)
- Intel Basic Command Set
- Scaleable Command Set
• Power-Down Mode
- Reset, Power Down Registers
To provide a 16 bit word wide access supported by the PCMCIA
standard, devices are paired on the card. Therefore, the Flash array
is structured in 128K word (256kB) blocks. Write, read and block
erase operations can be performed as either a word or byte wide
operation.
The FLF10 series cards conform to the PC Card 95 Standard
supported by PCMCIA and JEIDA, providing electrical and
physical compatibility. The PC Card form factor offers an industry
standard pinout and mechanical outline, allowing density upgrades
without system design changes.
• 100,000 Erase Cycles per Block
• 128K word symmetrical Block
Architecture
• PC Card Standard Type I Form Factor
WEDC’s standard cards are shipped with WEDC’s Flash Logo.
Cards are also available with blank housings (no Logo). The blank
housings are available in both, a recessed (for label) or flat housing.
Please contact your WEDC sales representative for further
information on Custom artwork.
June 2000 Rev. 3 - ECO #12877
1
PC Card Products

1 page




FLF10 pdf
PCMCIA Flash Memory Card
FLF10 Series
Card Interface
The FLF10 series flash card complies with PC Card standard (PCMCIA, March 1997). While maintaining
PCMCIA compatibility, the FLF10 series card has integrated special features to extend functionality.
The card has built-in 2 control registers:
- Configuration Option Register (COR)
www.datasheet4u.com
Address = 4000h
- Configuration and Status Register (CSR)
Address = 4002h
COR register: provides a soft reset function (bit D7) and additional page bits (bits D0 and D1) to extend
card capacity beyond 64MB.
SReset
As defined by PCMCIA, setting the SReset bit to 1, places the card in the reset state. During this state
all memory devices are placed in power down mode, minimizing power consumption. Returning this bit
to 0 leaves the reset cycle and places the card in the same condition as following a power up or hardware
reset. This bit must be cleared to 0, to access any device on the card.
Complete soft reset cycle must consist of a 2 step write sequence to the SReset bit:
1. Initialization: write 1 to SReset
- reset cycle begin
- memory devices enters Power-Down mode aborting all operations and clearing all registers.
2. Write 0 to SReset
- Reset cycle ends
- memory devices and registers enter power on default state
The card can also be placed in Power Down mode by activating the Reset signal (pin58) or by
controlling the bit D2 (PwrDwn) in the CSR register.
LevlRequest
Not supported
Configuration Index
Configuration Index bits (D0 - D5) are defined to provide address extension bits -page address, to extend
card capacity beyond 64MB.
Only bits D0 and D1 are supported:
- D1D0 set to 00bin (0H) selects page 0
- D1D0 set to 01bin (1H) selects: page 1
- D1D0 set to10bin (2H) selects: page 2
- D1D0 set to11bin (3H) selects: page 3 (No Memory Access)
D1D0 is set to the value of 00bin (0H) during any reset cycle (Power on Reset, Hardware
Reset, and SReset). Attempting to access page 3 will not result in the writing or reading of
data.
CSR register: provides a power control of the memory array. Only bit D2 is supported; all other bits are
“don’t care”
PwrDwn
Writing 1 to PwrDwn bit (D2) forces each memory device on the card into a reset/power down mode by
asserting all the devices RP# pins. Writing 0 to the bit returns the array to stand by mode.
June 2000 Rev. 3 - ECO #12877
5
PC Card Products

5 Page





FLF10 arduino
PCMCIA Flash Memory Card
FLF10 Series
Data Write and Erase Performance (1,3)
VCC = 5V ± 5%, TA = 0C to + 70C
SYM Parameter
www.datasheettW4HuQ.cVo1m Word/Byte Program time
tWHQV3
tWHQV4
tWHRH
Byte Program Time (using
Byte program command)
Block Program Time (using
write to buffer command)
Block Erase Time
Erase Suspend Latency
Time to Read
Notes Min
2,4
Typ(1) Max
6.3
180
Units Test Conditions
µs Effective time per Byte
(using Write Buffer)
µs
2 0.8 sec Word Program Mode
2 0.7 sec
26 35 µs
Notes:
1. Typical: Nominal voltages and TA = 25C.
2. Excludes system overhead.
3. Valid for all speed options.
4. To maximize system performance RDY/BSY# signal should be polled.
Waveforms for Reset Operation
RST
RDY/BSY
Read Operation
Write Operation
Valid Output
trec (RST)
trec (WEL)
tw(RST)
P2
WE#
tWHQV
tWHRH
tWHRL
SYMBOL
tw(RST)
P2
trec (RST)
trec (WEL)
tWHRL
Parameter
Reset pulse High time
RST Low to reset during
Erase/Program/Lock-bit
Reset Low to output delay
Reset Recovery to WE going Low
WE High to Rdy/Bsy going low
Min
35
1
Max
100
500
100
Unit
µs
ns
ns
µs
ns
June 2000 Rev. 3 - ECO #12877
11
PC Card Products

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