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PDF IP1202PBF Data sheet ( Hoja de datos )

Número de pieza IP1202PBF
Descripción PWM Control & Passives
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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No Preview Available ! IP1202PBF Hoja de datos, Descripción, Manual

PD-97111
iP1202PbF
www.datasheet4u.com
Features
• 5.5V to 13.2V input voltage
• 0.8V to 5V output voltage
• 2 Phase Synchronous Buck Power Block
• 180° out of phase operation
• Single or Dual output capability
• Dual 15A maximum load capability
• Single 2 phase 30A maximum load capability
• 200-400kHz per channel nominal switching frequency
• Over Current Hiccup or Over Current Latch
• External Synchronization Capable
• Overvoltage protection
• Individual soft start per outputs
• Over Temperature protection
• Internal features minimize layout sensitivity *
• Ease of layout
• Very small outline 15.5mm x 9.25mm x 2.6mm
Description
Dual Output Full Function 2 Phase
Synchronous Buck Power Block
Integrated Power Semiconductors,
PWM Control & Passives
iP1202PbF Power Block
The iP1202PbF is a fully optimized solution for medium current synchronous buck applications requiring up to
15A or 30A. The iP1202PbF is optimized for 2 phase single output applications up to 30A or dual output, each
up to 15A with interleaved input. It includes full function PWM control, with optimized power semiconductor chip-
sets and associated passives, achieving high power density. Very few external components are required to
create a complete synchronous buck power supply.
iPOWIR technology offers designers an innovative space-saving solution for applications requiring high power
densities. iPOWIR technology eases design for applications where component integration offers benefits in
performance and functionality. iPOWIR technology solutions are also optimized internally for layout, heat
transfer and component selection.
iP1202PbF Configurations
Channel 1
V IN
V OUT
V IN
V OUT
Channel 2
V OUT
Single Output
Dual Output
* Although, all of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR block, proper layout techniques
should be applied for the design of the power supply board. The iPOWIR block will function normally, but not optimally without any additional input decoupling
capacitors. Input decoupling capacitors should be added at Vin pin for stable and reliable long term operation. See layout guidelines in datasheet for more
detailed information.
www.irf.com
8/16/06
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IP1202PBF pdf
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11
www.datasheet4u.com10
9
8
7
6
5
4
3
2
1
0
0
VIN = 12V
V OUT 1 = V OUT 2 = 1.5V
f SW = 300kHz
L = 1.0µH
TBLK = 125°C
iP1202PbF
M aximum
T ypical
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Output Current per Channel (A)
Fig. 2: Power Loss vs. Current
16 0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
www.irf.com
Case Temperature (ž&
10 20 30 40 50 60 70 80 90 100 110 120
Safe
Operating
Area
TX
VIN = 12V
V OUT 1 = V OUT 2 = 1.5V
IOUT = 15A
f SW = 300kHz
L = 1.0µH
10 20 30 40 50 60 70 80 90 100 110 120
PCB Temperature (ºC)
Fig. 3: Safe Operating Area (SOA) vs. TPCB & TCASE
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IP1202PBF arduino
www.datasheet4u.com
VIN
ENABLE
iP1202PbF
VIN
VSW1
PGND
OCSET1
OCSET2
CC1
SS1
FB1
FB1s
SYNC
Vref
HICCUP VP-ref PGOOD
CC2
SS2
FB2
FB2s
RT
PGND
VSW2
www.irf.com
All Dimensions in inches (millimeters)
Fig. 11: Recommended PCB Footprint (Top View)
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