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PDF NCP4331 Data sheet ( Hoja de datos )
| Número de pieza | NCP4331 | |
| Descripción | Synchronous Buck Controller | |
| Fabricantes | ON Semiconductor | |
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NCP4331
Advance Information
Synchronous Buck
Controllerwww.datasheet4u.com for High
Efficiency Post Regulation
The NCP4331 houses a dual MOSFET driver intended to be used as
a companion chip in ac-dc or dc-dc multi-output post regulated
power supplies. Directly fed by the secondary ac signal, the device
keeps power dissipation to the lowest while reducing external
component count. Further, the implementation of N-channel
MOSFETs gives NCP4331-based applications a significant advantage
in terms of efficiency.
Features
•ăHigh Gate Drive Capability
•ăBootstrap for N-MOSFET High-Side Drive
•ăTwo Embedded Error Amplifiers Allowing Constant Current
Constant Voltage (CCCV) Operation
•ă±1.5% Regulation Voltage Reference Over 0°C to 85°C Temperature
Range
•ăProgrammable Soft-Start
•ăThermal Shutdown for Overtemperature Protection
•ăPWM Operation Synchronized to the Converter Frequency
•ăOver-Lap Management for Soft Switching
•ăInternal Regulator to Ease the Circuit Feeding
•ăUndervoltage Detection
•ăThese are Pb-Free Devices
Typical Applications
•ăOff-line Switch Mode Power Supplies
•ăPower Dc-dc Converters
•ăEfficient Alternative to Mag-Amp Post-Regulators
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MARKING DIAGRAMS
16
1
SO-16
D SUFFIX
CASE 751B
16
NCP4331G
ALYYWW
1
16
16
NCP
1
TSSOP-16
DB SUFFIX
CASE 948F
4331
ALYWG
G
1
A = Assembly Location
L = Wafer Lot
YY = Year
WW = Work Week
G or G = Pb-Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
CSout 1
CSin- 2
CSin+ 3
UVP/STDWN 4
COMP 5
FB 6
SS/Dmax 7
Cramp 8
16 VCC
15 BST
14 HS_DRV
13 HB
12 VDD
11 LS_DRV
10 GND
9 SYNC
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
(Top View)
ORDERING INFORMATION
Device
Package
Shipping
NCP4331DR2G
SOIC-16
(Pb-Free)
NCP4331DBR2G TSSOP-16
(Pb-Free)
2500 /
Tape & Reel
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©Ă Semiconductor Components Industries, LLC, 2007
October, 2007 - Rev. P1
1
Publication Order Number:
NCP4331/D
1 page  
NCP4331
MAXIMUM RATINGS
Symbol
Rating
Value
Unit
BST, HB Bootstrap and “Half-Bridge” Node Inputs (Referenced to GND)
-2, +40
V
BSTHB Bootstrap Pin Voltage Referenced to the HB Node
VCC Internal Regulator Input
Vin Pins 1, 2, 3, 4, 5, 6, 7, 8 and 9
www.datasheVeDt4Du.com Supply Voltage
RqJA
Thermal Resistance (TSSOP-16 and SOIC-16)
ESD Capability, Human Body Model (HBM)
-0.3, +10
-0.3, +30
-0.3, +5
-0.3, +10
145
2
V
V
V
V
°C/W
kV
ESD Capability, Machine Model (MM) (Note 2)
200 V
TA Operating Temperature Range (Note 1)
-40, +125
°C
TJmax Maximum Junction Temperature
150 °C
TSmax Storage Temperature Range
-65 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The maximum junction temperature should not be exceeded.
2. The Machine Model ESD capability is 150 V for Pin 9.
ELECTRICAL CHARACTERISTICS (VCC = 20 V, VBST = 7 V, HB Grounded, TJ = 0°C to +125°C, unless otherwise specified)
Symbol
Rating
Min Typ Max Unit
HIGH-SIDE OUTPUT STAGE
RHS_source Source Resistance @ Isource = 100 mA
- 3 6W
RHS_sink Sink Resistance @ Isink = 100 mA
- 2 4W
tr-HS
tf-HS
Rise and Fall Times:
High-Side Output Voltage Rise Time (CL = 1 nF) (Note 3)
High-Side Output Voltage Fall Time (CL = 1 nF) (Note 3)
ns
- 13 20
- 8 15
TLS-HS Delay from Low-Side Gate Drive Low (High) to High-Side Drive High 35 55 75 ns
(Low) (Note 6)
LOW-SIDE OUTPUT STAGE
RLS_source Source Resistance @ Isource = 100 mA
RLS_sink Sink Resistance @ Isink = 100 mA
tr-LS
tf-LS
Rise and Fall Times:
High-Side Output Voltage Rise Time (CL = 1 nF) (Note 3)
High-Side Output Voltage Fall Time (CL = 1 nF) (Note 3)
CURRENT CONTROL ERROR AMPLIFIER (Auxiliary Error Amplifier)
- 3 6W
- 2 4W
ns
- 13 20
- 8 15
IBpin3
IBpin2
Vio
BW
Noninverting Input Bias Current @ Vpin3 = Vpin2 = Vref
Inverting Input Bias Current @ Vpin3 = Vpin2 = Vref
Input Offset Voltage (Note 5)
Gain Bandwidth
-500
-500
-5
-
-100
-100
1
4
0 nA
0 nA
5 mV
- MHz
GEA Open Loop Voltage Gain
VLL Pin 1 Voltage if Vpin2 = 1 V and Vpin3 = 0 V, 100 mA Being Sourced Into
Pin 1
-
0
70 - dB
- 0.5 V
3. The risetime is the time needed by the drive to go from 10% to 90% of the supply voltage. The fall time is the time required by the drive
to drop from 90% to 10% of its supply voltage. These times are not tested in production but only guaranteed by design.
4. Guaranteed by design. Tested through the RRESET parameter.
5. Guaranteed by characterization and design.
6. This delay is specified with the HB pin being grounded. In typical application where the HB node is pulsing, the delay is 70 ns typically
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5
5 Page 
NCP4331
DETAILED OPERATING DESCRIPTION
Introduction
The NCP4331 is ideal in multi-outputs applications
where efficiency, ease of implementation and compactness
are key requirements. Since it is often impossible to tightly
regulate all the outputs and since a further regulation of the
www.dataosuhtepeutt4sui.csonmot an efficient option, it is preferable to do as
follows:
• Traditionally regulate the highest output voltage.
• Post-regulate the other ones, by directly drawing the
energy from the transformer secondary ac voltage. The
NCP4331 is a controller developed to drive such buck
converters that have the ability to operate from pulsed
voltage.
Typically, NCP4331 driven post-regulators are
associated to forward converters as portrayed by Figure 20.
For the sake of the simplicity, the forward of Figure 20
consists of a simple demagnetization winding and output
diodes, but more sophisticated options including active
clamp and synchronous rectification, would lead to a better
global efficiency of the solution.
Also, one can associate the NCP4331 to other
architectures (like two switches' forward or half-bridge
converters). Any converter able to provide the NCP4331
post-regulator with a square wave source could use this
concept, as long as the NCP4331 maximum ratings are not
exceeded (in particular, the “BST” and “HB” maximum
voltage).
Finally, the NCP4331 has the following main benefits:
• Efficiency: The NCP4331 concept avoids the
implementation of downstream converters to re-process
the main converter output voltage when two or more
outputs are to be tightly regulated. Instead, like
Mag-amp systems, NCP4331 driven post-regulators
directly draw the energy from the secondary side of the
main converter transformer, for a more efficient power
processing. In addition, the circuit manages the
sequencing in a smart manner so that three over the
four transitions are soft. The high gate drive capability
of the NCP4331 and the utilization of N-MOSFETs for
both the high and low sides reduce the conduction
losses to a minimum (synchronous rectification).
• Ease of implementation and compactness: The
NCP4331 is housed in a small SO16 package and it
incorporates all the functions necessary for a reliable
post-regulation (synchronization block, accurate
regulation block, soft-start, current control). Hence,
NCP4331 driven post-regulation requires few external
components. Also the high switching frequency levels
it can handle (up to 400 kHz) allows the utilization of
small output coil and capacitor. An internal regulator
highly eases the circuit feeding.
• Robustness: The NCP4331 embeds powerful features
to protect the application from possible over-stresses
and make the post-regulator very rugged. In particular,
it incorporates a second operational amplifier to lower
the duty-cycle and ultimately clamp the coil current
when it tends to become excessive (CCCV
characteristic). Also, the soft-start and the undervoltage
protections improve reliability. In addition, they help
control the start and end of the post-regulator
operation. Ultimately, the integration within the whole
system is eased.
Post-Regulation Operation
Figure 20 illustrates the concept where two outputs are to
be regulated (”Vout1” and “Vout2”). The highest output
(Vout1) is traditionally regulated thanks to a regulation
arrangement that modulates the forward converter duty
cycle. The other output (Vout2) is regulated by a dual
MOSFET arrangement driven by the NCP4331. The
high-side MOSFET turns on during one part of the forward
converter on-time, while the low-side power switch is ON
for the rest of the period (free wheeling).
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11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet NCP4331.PDF ] | |
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