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PDF TEA1750 Data sheet ( Hoja de datos )
| Número de pieza | TEA1750 | |
| Descripción | GreenChip III SMPS control IC | |
| Fabricantes | NXP Semiconductors | |
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TEA1750
GreenChip III SMPS control IC
Rev. 02 — 15 December 2008
Product data sheet
www.datasheet4u.com
1. General description
The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS)
controller ICs. The TEA1750 combines a controller for Power Factor Correction (PFC) and
a flyback controller. Its high level of integration allows the design of a cost-effective power
supply with a very low number of external components.
The special built-in green functions provide high efficiency at all power levels. This applies
to quasi-resonant operation at high power levels, quasi-resonant operation with valley
skipping, as well as to reduced frequency operation at lower power levels. At low power
levels, the PFC switches over to burst mode control to maintain high efficiency. In burst
mode, soft-start and soft-stop functions are added to eliminate audible noise.
During low power conditions, the flyback controller switches to frequency reduction mode
and limits the peak current to 25 % of its maximum value. This will ensure high efficiency
at low power and good standby power performance while minimizing audible noise from
the transformer.
The proprietary high voltage BCD800 process makes direct start-up possible from the
rectified universal mains voltage in an effective and green way. A second low voltage
Silicon On Insulator (SOI) IC is used for accurate, high speed protection functions and
control.
The TEA1750 enables highly efficient and reliable supplies with power requirements up to
250 W, to be designed easily and with the minimum number of external components.
2. Features
2.1 Distinctive features
I Integrated PFC and flyback controller
I Universal mains supply operation (70 V AC to 276 V AC)
I High level of integration, resulting in a very low external component count and a
cost-effective design
2.2 Green features
I On-chip start-up current source
2.3 PFC green features
I Valley/zero voltage switching for minimum switching losses (patented)
I Frequency limitation to reduce switching losses
I Burst mode operation if a low load is detected at the flyback output (patented)
1 page  
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
7. Functional description
www.datasheet4u.com
7.1 General control
The TEA1750 contains a controller for a power factor correction circuit as well as a
controller for a flyback circuit. A typical configuration is shown in Figure 3.
12 11 9 16 13
8 10
6
TEA1750T
7
4
3 21
014aaa016
Fig 3. Typical configuration of TEA1750
7.1.1 Start-up and undervoltage lock-out
Initially the capacitor on the VCC pin is charged from the high voltage mains via the HV pin.
As long as VCC is below Vtrip, the charge current is low. This protects the IC in case the
VCC pin is shorted to ground. For a short start-up time the charge current above Vtrip is
increased until VCC reaches Vth(UVLO). If VCC is between Vth(UVLO) and Vstartup, the charge
current is low again, ensuring a low duty cycle during fault conditions.
The control logic activates the internal circuitry and switches off the charge current when
the voltage on pin VCC passes the Vstartup level. First, the LATCH pin output is activated
and the soft-start capacitors on the PFCSENSE and FBSENSE pins are charged. When
the LATCH pin voltage exceeds the Ven(LATCH) voltage and the soft-start capacitor on the
PFCSENSE pin is charged, the PFC circuit is activated. The supply current from the
HV pin is then switched on again and the PFC circuit charges the Cbus capacitor. When
the voltage on pin VOSENSE reaches the Vstart(fb) level, the charge current is switched off
and the flyback converter is activated (providing the soft-start capacitor on the FBSENSE
pin is charged). The output voltage of the flyback converter is then regulated to its nominal
output voltage. The IC supply is taken over by the auxiliary winding of the flyback
converter. See Figure 4.
TEA1750_2
Product data sheet
Rev. 02 — 15 December 2008
© NXP B.V. 2008. All rights reserved.
5 of 29
5 Page 
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
www.datasheet4u.com
Vburst(H)
VVOSENSE
envelop of
peak current
Vburst(L)
Fig 6. Burst mode control
soft-start
ton control soft-stop
014aaa019
7.2.7 Overcurrent protection (PFCSENSE pin)
The maximum peak current is limited cycle-by-cycle by sensing the voltage across an
external sense resistor (RSENSE1) on the source of the external MOSFET. The voltage is
measured via the PFCSENSE pin.
7.2.8 Mains undervoltage lock-out / brownout protection (VINSENSE pin)
To prevent the PFC from operating at very low mains input voltages, the voltage on the
VINSENSE pin is sensed continuously. As soon as the voltage on this pin drops below the
Vstop(VINSENSE) level, switching of the PFC is stopped. If the low mains situation continues,
the PFC bus voltage eventually drops. The voltage on the VOSENSE pin then drops below
the Vstart(fb) level and the flyback converter is also disabled.
The voltage on pin VINSENSE is clamped to a minimum value,
(Vstart(VINSENSE) − ∆Vpu(VINSENSE)) for a fast restart as soon as the mains input voltage is
restored after a mains dropout.
7.2.9 Overvoltage protection (VOSENSE pin)
To prevent output overvoltage during load steps and mains transients, an overvoltage
protection circuit is built in.
As soon as the voltage on the VOSENSE pin exceeds the Vovp(VOSENSE) level, switching of
the power factor correction circuit is inhibited. Switching of the PFC recommences as
soon as the VOSENSE pin voltage drops below the Vovp(VOSENSE) level again.
When the resistor between pin VOSENSE and ground is open, the overvoltage protection
is also triggered.
7.2.10 PFC open loop protection (VOSENSE pin)
The power factor correction circuit does not start switching until the voltage on the
VOSENSE pin is above the Vth(ol)(VOSENSE) level. This protects the circuit from open loop
and VOSENSE short situations. As the VOSENSE pin draws a small input current,
switching is also inhibited when the pin is left open.
TEA1750_2
Product data sheet
Rev. 02 — 15 December 2008
© NXP B.V. 2008. All rights reserved.
11 of 29
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