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PDF TEA1742T Data sheet ( Hoja de datos )
| Número de pieza | TEA1742T | |
| Descripción | GreenChip PFC controller | |
| Fabricantes | NXP Semiconductors | |
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TEA1742T
GreenChip PFC controller
Rev. 01 — 10 February 2009
Objective data sheet
www.datasheet4u.com
1. General description
The TEA1742T is a controller for Power Factor Correction (PFC). Its high level of
integration allows the design of a cost-effective power supply with a very low number of
external components.
The special built-in green functions provide high efficiency at all power levels. This applies
to quasi-resonant operation at high power levels and quasi-resonant operation with valley
skipping.
The TEA1742T enables highly efficient and reliable supplies with power requirements of
up to 500 W, to be designed easily and with the minimum number of external components.
2. Features
2.1 Distinctive features
I Universal mains supply operation (70 V (AC) to 276 V (AC))
I Dual boost PFC with accurate output voltage (NXP patented)
I High level of integration, resulting in a very low external component count and a
cost-effective design
I Low start-up supply voltage
2.2 Green features
I Valley/zero voltage switching for minimum switching losses (NXP patented)
I Frequency limitation to reduce switching losses
I High ohmic resistive dividers possible to minimize losses
2.3 Protection features
I Safe restart mode for system fault conditions
I Continuous mode protection by means of demagnetization detection (NXP patented)
I Accurate OverVoltage Protection (OVP)
I Open control loop protection
I IC OverTemperature Protection (OTP)
I Low and adjustable OverCurrent Protection (OCP) trip level
1 page  
NXP Semiconductors
TEA1742T
GreenChip PFC controller
7. Functional description
www.datasheet4u.com
7.1 General control
The TEA1742T contains a controller for a power factor correction circuit. A typical
configuration is shown in Figure 3.
76
4
3
5
TEA1742T
2
1
8 VCC
Fig 3. Typical configuration
014aaa736
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
The control logic activates the internal circuitry when the voltage on pin VCC passes the
Vstartup level. First, the soft start capacitor on the PFCSENSE pin is charged. When the
soft start capacitor on the PFCSENSE pin is charged, the PFC circuit is activated. See
Figure 4.
When one of the protection functions is activated, the converter stops switching. For a
restart protection the VCC has to be pulled below Vth(UVLO) to reset the protection. For a
latched protection (OTP), the VCC has to drop below about 4 V (typ).
TEA1742T_1
Objective data sheet
Rev. 01 — 10 February 2009
© NXP B.V. 2009. All rights reserved.
5 of 17
5 Page 
NXP Semiconductors
TEA1742T
GreenChip PFC controller
Table 5. Characteristics …continued
Tamb = 25 °C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
www.dtahteasIChe;eut4nule.csosmotherwise specified.
Symbol
Parameter
Conditions
Min Typ Max Unit
Ipu(VINSENSE)
pull-up current on pin
VINSENSE
active after Vstop(VINSENSE) is
detected
−55 −47 −40 µA
Vmvc(VINSENSE)max maximum mains voltage
compensation voltage on pin
VINSENSE
4.0 - - V
II(VINSENSE)
input current on pin VINSENSE VINSENSE > Vstop(VINSENSE) after 5 33 100 nA
Vstart(VINSENSE) is detected
Vbst(dual)
dual boost voltage
current switch-over point
- 2.2 - V
switch-over region
- 200 - mV
Loop compensation PFC (pin PFCCOMP)
gm
IO(PFCCOMP)
Vclamp(PFCCOMP)
transconductance
output current on pin
PFCCOMP
clamp voltage on pin
PFCCOMP
VVOSENSE to IO(PFCCOMP)
60 80 100 µA/V
VVOSENSE = 2.0V
33 39 45 µA
VVOSENSE = 3.3V
−45 −39 −33 µA
Low power mode, PFC off, lower [1] 2.5 2.7 2.9 V
clamp voltage
Upper clamp voltage
[1] -
3.9 -
V
Vton(PFCCOMP)zero zero on-time voltage on pin
PFCCOMP
3.4 3.5 3.6 V
Vton(PFCCOMP)max maximum on-time voltage on
pin PFCCOMP
1.20 1.25 1.30 V
Pulse width modulator PFC
ton(PFC)
PFC on-time
VVINSENSE = 3.3 V, VPFCCOMP =
Vton(PFCCOMP)max
VVINSENSE = 0.9 V, VPFCCOMP =
Vton(PFCCOMP)max
3.6 4.5 5.0 µs
30 40 53 µs
Output voltage sensing PFC (pin VOSENSE)
Vth(ol)(VOSENSE)
open-loop threshold voltage on
pin VOSENSE
- 1.15 - V
Vreg(VOSENSE)
regulation voltage on pin
VOSENSE
for IO(PFCCOMP) = 0
2.475 2.500 2.525 V
Vovp(VOSENSE)
overvoltage protection voltage
on pin VOSENSE
2.60 2.63 2.67 V
Ibst(dual)
dual boost current
VVINSENSE < Vbst(dual) or VVOSENSE - -8 - µA
< 2.1 V
VVINSENSE > Vbst(dual)
- -30 - nA
Overcurrent protection PFC (pin PFCSENSE)
Vsense(PFC)max
maximum PFC sense voltage
∆V/∆t = 50 mV/µs
∆V/∆t = 200 mV/µs
0.49 0.52 0.55 V
0.51 0.54 0.57 V
tleb(PFC)
PFC leading edge blanking
time
250 310 370 ns
Iprot(PFCSENSE)
protection current on pin
PFCSENSE
−50 -
−5 nA
TEA1742T_1
Objective data sheet
Rev. 01 — 10 February 2009
© NXP B.V. 2009. All rights reserved.
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