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PDF S-93L66A Data sheet ( Hoja de datos )

Número de pieza S-93L66A
Descripción (S-93Lx6A) LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Fabricantes Seiko Instruments 
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S-93L46A/56A/66A
www.sii-ic.com
© SII Semiconductor Corporation, 2004-2015
LOW VOLTAGE OPERATION
3-WIRE SERIAL E2PROM
Rev.8.1_01
The S-93L46A/56A/66A is a low voltage operation, high speed, low current consumption, 3-wire serial E2PROM with a wide
operating voltage range. The S-93L46A/56A/66A has the capacity of 1 K-bit, 2 K-bit and 4 K-bit, and the organization is 64-
word × 16-bit, 128-word × 16-bit, and 256-word × 16-bit. It is capable of sequential read, at which time addresses are
automatically incremented in 16-bit blocks.
The communication method is by the Microwire bus.
Features
Operating voltage range:
Read
1.6 V to 5.5 V
Write
1.8 V to 5.5 V (WRITE, ERASE)
2.7 V to 5.5 V (WRAL, ERAL)
Operation frequency:
2.0 MHz (VCC = 4.5 V to 5.5 V)
Write time:
8.0 ms max.
Sequential read capable
Write protect function during the low power supply voltage
Function to protect against write due to erroneous instruction recognition
Endurance:
106 cycles / word*1 (Ta = +85°C)
Data retention:
100 years (Ta = +25°C)
20 years (Ta = +85°C)
Memory capacity:
S-93L46A:
1 K-bit
S-93L56A:
2 K-bit
S-93L66A:
4 K-bit
Initial delivery state:
FFFFh
Operation temperature range: Ta = 40°C to +85°C
Lead-free, Sn 100%, halogen-free*2
*1. For each address (Word: 16-bit)
*2. Refer to “Product Name Structure” for details.
Packages
8-Pin SOP (JEDEC)
8-Pin TSSOP
TMSOP-8
SNT-8A
Caution
This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to SII
Semiconductor Corporation is indispensable.
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S-93L66A pdf
Rev.8.1_01
LOW VOLTAGE OPERATION 3-WIRE SERIAL E2PROM
S-93L46A/56A/66A
Instruction Sets
1. S-93L46A
Table 6
Instruction
SK input clock
Start Bit
1
Operation
Code
23
4
Address
567
89
Data
10 to 25
READ (Read data)
1 1 0 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
WRITE (Write data)
1 0 1 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data)
1
1 1 A5 A4 A3 A2 A1 A0
WRAL (Write all)
1 0 0 0 1 x x x x D15 to D0 Input
ERAL (Erase all)
1 00 1 0 x x x x
EWEN (Write enable)
1
00 1 1 x x x x
EWDS (Write disable)
1
00 0 0 x x x x
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
2. S-93L56A
Table 7
Instruction
SK input clock
Start Bit
1
Operation
Code
23
Address
4 5 6 7 8 9 10 11
Data
12 to 27
READ (Read data)
1 1 0 x A6 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
WRITE (Write data)
1
0 1 x A6 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data)
1
1 1 x A6 A5 A4 A3 A2 A1 A0
WRAL (Write all)
1 0 0 0 1 x x x x x x D15 to D0 Input
ERAL (Erase all)
1 0 0 1 0 x x x x xx
EWEN (Write enable)
1
0 0 1 1 x x x x xx
EWDS (Write disable)
1
0 0 0 0 x x x x xx
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
3. S-93L66A
Table 8
Instruction
SK input clock
Start Bit
1
Operation
Code
23
Address
4 5 6 7 8 9 10 11
Data
12 to 27
READ (Read data)
1 1 0 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
WRITE (Write data)
1
0 1 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data)
1
1 1 A7 A6 A5 A4 A3 A2 A1 A0
WRAL (Write all)
1 0 0 0 1 x x x x x x D15 to D0 Input
ERAL (Erase all)
1 0 0 1 0 x x x x xx
EWEN (Write enable)
1
0 0 1 1 x x x x xx
EWDS (Write disable)
1
0 0 0 0 x x x x xx
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
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S-93L66A arduino
Rev.8.1_01
LOW VOLTAGE OPERATION 3-WIRE SERIAL E2PROM
S-93L46A/56A/66A
3. Reading (READ)
The READ instruction reads data from a specified address.
After CS has gone high, input an instruction in the order of the start bit, read instruction, and address. Since the
last input address (A0) has been latched, the output status of the DO pin changes from high impedance (High-Z) to
low, which is held until the next rise of SK. 16-bit data starts to be output in synchronization with the next rise of
SK.
3. 1 Sequential read
After the 16-bit data at the specified address has been output, inputting SK while CS is high automatically
increments the address, and causes the 16-bit data at the next address to be output sequentially. The above
method makes it possible to read the data in the whole memory space. The last address (An  A1 A0 = 1  1
1) rolls over to the top address (An  A1 A0 = 0  0 0).
CS
SK
1 2 3 4 5 6 7 8 9 10 11 12
23 24 25 26 27 28
39 40 41 42 43 44
DI <1> 1 0 A5 A4 A3 A2 A1 A0
DO High-Z
0 D15 D14 D13
D2 D1 D0 D15 D14 D13
D2 D1 D0 D15 D14 D13
High-Z
ADRINC
ADRINC
Figure 8 Read Timing (S-93L46A)
CS
SK
1 2 3 4 5 6 7 8 9 10 11 12 13 14
24 25 26 27 28 29
40 41 42 43 44 45
DI
DO
<1> 1
0 A6 A5 A4 A3 A2 A1 A0
High-Z
x: S-93L56A
A7: S-93L66A
0 D15 D14 D13
D2 D1 D0 D15 D14 D13
D2 D1 D0 D15 D14 D13
ADRINC
Figure 9 Read Timing (S-93L56A, S-93L66A)
ADRINC
High-Z
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