PDF UT62W1024 Data sheet ( Hoja de datos )

Número de pieza	UT62W1024
Descripción	128K X 8-Bit Wide Range Low Power CMOS SRAM
Fabricantes	Utron technology
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No Preview Available !  UTRON wRwewv..D1a.t1aSheet4U.com UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM REVISION HISTORY REVISION REV. 0.9 REV. 1.0 REV. 1.1 Original. DESCRIPTION 1. The symbols CE1# ,OE# & WE# are revised as CE , OE & 2. Icc1 is revise as Icc. 3. Icc2 is revise as Icc1. Add order information for lead free product . DATE Mar.15. 2001 Jul. 06. 2001 May. 16. 2003 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 1 P80056 1 page  UTRON wRwewv..D1a.t1aSheet4U.com UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM CAPACITANCE (TA=25 , f=1.0MHz) PARAMETER SYMBOL MIN. MAX. Input Capacitance CIN - 8 Input/Output Capacitance CI/O - 10 Note : These parameters are guaranteed by device characterization, but not production tested. UNIT pF pF AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 5ns 1.5V CL=100pF, IOH/IOL=-1mA/4mA(VCC=5V) CL=50pF, IOH/IOL=-1mA/2mA(VCC=3.3V) AC ELECTRICAL CHARACTERISTICS (VCC = 2.7V~5.5V, V SS=0V , TA = 0 to 70 ) (1) READ CYCLE PARAMETER SYMBOL UT62W1024-35 UT62W1024-55 UT62W1024-70 MIN. MAX. MIN. MAX. MIN. MAX. Read Cycle Time tRC 35 - 55 - 70 - Address Access Time tAA - 35 - 55 - 70 Chip Enable Access Time tACE - 35 - 55 - 70 Output Enable Access Time tOE - 25 - 30 - 35 Chip Enable to Output in Low-Z tCLZ* 10 - 10 - 10 - Output Enable to Output in Low-Z tOLZ* 5 -5 - 5- Chip Disable to Output in High-Z tCHZ* - 25 - 30 - 35 Output Disable to Output in High-Z tOHZ* - 25 - 30 - 35 Output Hold from Address Change tOH 5 -5 - 5- UNIT ns ns ns ns ns ns ns ns ns (2) WRITE CYCLE PARAMETER SYMBOL UT62W1024-35 UT62W1024-55 MIN. MAX. MIN. MAX. Write Cycle Time tWC 35 - 55 - Address Valid to End of Write tAW 30 - 50 - Chip Enable to End of Write tCW 30 - 50 - Address Set-up Time tAS 0 - 0 - Write Pulse Width tWP 25 - 40 - Write Recovery Time tWR 0 - 0 - Data to Write Time Overlap tDW 20 - 25 - Data Hold from End of Write-Time tDH 0 -0 - Output Active from End of Write tOW* 5 -5 - Write to Output in High-Z tWHZ* - 15 - 20 *These parameters are guaranteed by device characterization, but not production tested. UT62W1024-70 MIN. MAX. 70 - 60 - 60 - 0- 45 - 0- 30 - 0- 5- - 25 UNIT ns ns ns ns ns ns ns ns ns ns UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 5 P80056 5 Page  UTRON wRwewv..D1a.t1aSheet4U.com UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM 32 pin TSOP-I Package Outline Dimension UNIT INCH(BASE) SYMBOL A 0.047 (MAX) A1 0.004 0.002 A2 0.039 0.002 b 0.008 + 0.002 - 0.001 c 0.005 (TYP) D 0.724 0.004 E 0.315 0.004 e 0.020 (TYP) HD 0.787 0.008 L 0.0197 0.004 L1 0.0315 0.004 y 0.003 (MAX) 0o 5o MM(REF) 1.20 (MAX) 0.10 0.05 1.00 0.05 0.20 + 0.05 -0.03 0.127 (TYP) 18.40 0.10 8.00 0.10 0.50 (TYP) 20.00 0.20 0.50 0.10 0.08 0.10 0.076 (MAX) 0o 5o UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 11 P80056 11 Page

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