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Número de pieza | L6722 | |
Descripción | 3 Phase controller | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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L6722
3 Phase controller for DC/DC converters
Features
■ 2A integrated gate drivers
■ 0.8V reference
■ 1% output voltage accuracy
■ Adjustable reference offset
■ Precise current sharing and OCP across LS
MOSFETS
■ Constant over current protection
■ Feedback disconnection
■ LSLESS allows managing pre-bias startup
■ Preliminary of protection
■ Oscillator internally fixed at 100kHz, externally
adjustable
■ Power good
■ Integrated remote sense buffer
■ VFQFPN36 package with exposed pad
Applications
■ Memory supply for server and workstation MBs
■ High density DC / DC converters
■ High current pol
VFQFPN36
Description
L6722 implements a three-phase step-down
controller with 120º phase-shift between each
phase with integrated high-current drivers in a
compact VFQFPN36 package with exposed pad.
L6722 manages output voltages down to 0.8V
with ±1% output voltage accuracy over line and
temperature variations. Additional programmable
offset can be added to the reference voltage with
a single external resistor in order to perform
margining tests.
The controller assures fast protection against load
over current and over / under voltage. In case of
over-current the system works in Constant
Current mode until UVP. Preliminary OVP allows
full load protection in case of startup with failed
HS. Feedback-disconnection protection prevents
from damaging the load in case of misconnections
in the remote sense. Pre-bias start-up is also
managed thanks to LSLESS.
Combined use of DCR and RdsON current
sensing assures precision in voltage positioning
(by reading droop current across inductors DCR)
and safe current sharing and OCP per each
phase (by reading the current across LS RdsON).
Droop function can be anyway disabled to
perform precise and load-insensitive regulation.
Order codes
Part number
L6722
L6722TR
Package
VFQFPN36
VFQFPN36
Packing
Tube
Tape & Reel
May 2006
Rev 1
1/34
www.st.com
34
1 page L6722
1 Typical application circuit and block diagram
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Figure 2. Typical application circuit - droop enabled
VIN LIN
GNDIN
2
VCC
4
PGND
1, 26
SGND
ROSC
18
OSC/INH/FLT
19
REF_IN
20
REF_OUT
36
COMP
CF
RF 35
FB
RFB
34
VSEN
27
FBR
28
FBG
7
BOOT1
8
UGATE1
9
PHASE1
3
LGATE1
31
ISEN1
RISEN
10
BOOT2
11
UGATE2
12
PHASE2
5
LGATE2
30
ISEN2
RISEN
13
BOOT3
14
UGATE3
15
PHASE3
6
LGATE3
29
ISEN3
RISEN
32
CS+
33
CS-
RD
16
PGOOD
HS1
LS1
HS2
LS2
HS3
LS3
CIN
L1
to BOOT1
to BOOT2
to BOOT3
L2 Vcc_core
COUT
LOAD
L3
CPH
PGOOD
L6722 REFERENCE SCHEMATIC - droop
5/34
5 Page L6722
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3 Electrical specifications
3 Electrical specifications
3.1 Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol
Parameter
VCC
VBOOTx - VPHASEx
VUGATEx - VPHASEx
VPHASEx
to PGND
Boot Voltage
LGATEx, PHASEx, to PGNDx
All other Pins to PGNDx
Positive Peak Voltage; T<20ns @ 600kHz
Negative Peak Voltage
Value
15
15
15
-0.3 to VCC + 0.3
-0.3 to 7
26
TBD
Unit
V
V
V
V
V
V
V
3.2 Electrical characteristics
Table 4. Electrical characteristics
(VCC = 12V±15%, TJ = 0°C to 70°C unless otherwise specified).
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Supply current and power-on
ICC
VCC Supply current
HGATEx and LGATEx = OPEN
BOOTx = 12V
17
mA
IBOOTx
BOOTx Supply Current
HGATEx = OPEN; PHASEx to
PGNDx; BOOTx = 12V
0.7 mA
UVLOVCC
VCC Turn-ON
VCC Turn-OFF
VCC Rising
VCC Falling
9.2 V
7V
UVLOOVP
Pre-OVP Turn-ON
Pre-OVP Turn-OFF
VCC Rising
VCC Falling
3.8 V
3V
Oscillator and inhibit
FSW
INHIL
dMAX
∆VOSC
FLT
Main Oscillator Accuracy
OSC = OPEN
OSC = OPEN; TJ = 0°C to 125°C
90
110 kHz
Disable Thresholds
0.5 V
Maximum Duty Cycle
OSC = OPEN; IISENx = 0µA
OSC = OPEN; IISENx = 35µA
80 %
40 %
PWMx Ramp Amplitude
3V
Voltage at Pin OSC
OVP Active
5V
11/34
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet L6722.PDF ] |
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