PDF 7FLITES2 Data sheet ( Hoja de datos )

Número de pieza	7FLITES2
Descripción	ST7FLITES2
Fabricantes	STMicroelectronics
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ST7LITE0x, ST7LITESx www.DataS8he-eBt4UI.TcomMICROCONTROLLER WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI ■ Memories – 1K or 1.5K bytes single voltage Flash Pro- gram memory with read-out protection, In-Cir- cuit and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55°C. – 128 bytes RAM. – 128 bytes data EEPROM with read-out pro- tection. 300K write/erase cycles guaranteed, data retention: 20 years at 55°C. ■ Clock, Reset and Supply Management – 3-level low voltage supervisor (LVD) and aux- iliary voltage detector (AVD) for safe power- on/off procedures – Clock sources: internal 1MHz RC 1% oscilla- tor or external clock – PLL x4 or x8 for 4 or 8 MHz internal clock – Four Power Saving Modes: Halt, Active-Halt, Wait and Slow ■ Interrupt Management – 10 interrupt vectors plus TRAP and RESET – 4 external interrupt lines (on 4 vectors) ■ I/O Ports – 13 multifunctional bidirectional I/O lines – 9 alternate function lines – 6 high sink outputs ■ 2 Timers – One 8-bit Lite Timer (LT) with prescaler in- cluding: watchdog, 1 realtime base and 1 in- put capture. DIP16 SO16 150” QFN20 – One 12-bit Auto-reload Timer (AT) with output compare function and PWM ■ 1 Communication Interface – SPI synchronous serial interface ■ A/D Converter – 8-bit resolution for 0 to VDD – Fixed gain Op-amp for 11-bit resolution in 0 to 250 mV range (@ 5V VDD) – 5 input channels ■ Instruction Set – 8-bit data manipulation – 63 basic instructions with illegal opcode de- tection – 17 main addressing modes – 8 x 8 unsigned multiply instruction ■ Development Tools – Full hardware/software development package Device Summary Features ST7SUPERLITE ST7LITES2 ST7LITES5 ST7LITE02 ST7LITE0x ST7LITE05 ST7LITE09 Program memory - bytes 1K 1K 1.5K 1.5K 1.5K RAM (stack) - bytes 128 (64) 128 (64) 128 (64) 128 (64) 128 (64) Data EEPROM - bytes - - - - 128 Peripherals LT Timer w/ Wdg, LT Timer w/ Wdg, LT Timer w/ Wdg, AT Timer w/ 1 PWM, AT Timer w/ 1 PWM, AT Timer w/ 1 PWM, SPI SPI, 8-bit ADC SPI LT Timer w/ Wdg, AT Timer w/ 1 PWM, SPI, 8-bit ADC w/ Op-Amp Operating Supply 2.4V to 5.5V CPU Frequency 1MHz RC 1% + PLLx4/8MHz Operating Temperature -40°C to +85°C Packages SO16 150”, DIP16, QFN20 October 2006 Rev 5 1/125 1 1 page ST7LITE0x, ST7LITESx 1 INTRODUCTION T(ShTe7LwITwEwS.SDTxa7)tLaaSITrheEee0mt4xeUm.cobmearnsd of ST7SUPERLITE the ST7 microcon- troller family. All ST7 devices are based on a com- mon industry-standard 8-bit core, featuring an en- hanced instruction set. The ST7LITE0x and ST7SUPERLITE feature FLASH memory with byte-by-byte In-Circuit Pro- gramming (ICP) and In-Application Programming (IAP) capability. Under software control, the ST7LITE0x and ST7SUPERLITE devices can be placed in WAIT, SLOW, or HALT mode, reducing power consump- tion when the application is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. For easy reference, all parametric data are located in section 13 on page 82. Figure 1. General Block Diagram VDD VSS RESET 1 MHz. RC OSC + PLL x 4 or x 8 Internal CLOCK LVD/AVD POWER SUPPLY CONTROL 8-BIT CORE ALU FLASH MEMORY (1 or 1.5K Bytes) RAM (128 Bytes) DATA EEPROM (128 Bytes) LITE TIMER w/ WATCHDOG PORT A 12-BIT AUTO- RELOAD TIMER SPI PORT B 8-BIT ADC PA7:0 (8 bits) PB4:0 (5 bits) 5/125 1 5 Page ST7LITE0x, ST7LITESx REGISTER AND MEMORY MAP (Cont’d) www.DataSheet4U.com Legend: x=undefined, R/W=read/write Table 2. Hardware Register Map Address Block Register Label Register Name 0000h 0001h 0002h Port A PADR PADDR PAOR Port A Data Register Port A Data Direction Register Port A Option Register 0003h 0004h 0005h Port B PBDR PBDDR PBOR Port B Data Register Port B Data Direction Register Port B Option Register 0006h to 000Ah Reserved area (5 bytes) 000Bh 000Ch LITE TIMER LTCSR LTICR Lite Timer Control/Status Register Lite Timer Input Capture Register 000Dh 000Eh 000Fh 0010h 0011h 0012h 0013h ATCSR CNTRH AUTO-RELOAD TIMER CNTRL ATRH ATRL PWMCR PWM0CSR Timer Control/Status Register Counter Register High Counter Register Low Auto-Reload Register High Auto-Reload Register Low PWM Output Control Register PWM 0 Control/Status Register 0014h to 0016h Reserved area (3 bytes) 0017h AUTO-RELOAD DCR0H 0018h TIMER DCR0L PWM 0 Duty Cycle Register High PWM 0 Duty Cycle Register Low 0019h to 002Eh Reserved area (22 bytes) 0002Fh FLASH FCSR Flash Control/Status Register 00030h EEPROM EECSR Data EEPROM Control/Status Register 0031h 0032h 0033h SPIDR SPI Data I/O Register SPI SPICR SPI Control Register SPICSR SPI Control/Status Register 0034h 0035h 0036h ADC ADCCSR ADCDR ADCAMP A/D Control Status Register A/D Data Register A/D Amplifier Control Register 0037h ITC EICR External Interrupt Control Register 0038h 0039h CLOCKS MCCSR RCCR Main Clock Control/Status Register RC oscillator Control Register Reset Status 00h1) 00h 40h E0h 1) 00h 00h Remarks R/W R/W R/W R/W R/W R/W2) xxh R/W xxh Read Only 00h R/W 00h Read Only 00h Read Only 00h R/W 00h R/W 00h R/W 00h R/W 00h R/W 00h R/W 00h R/W 00h R/W xxh R/W 0xh R/W 00h R/W 00h R/W 00h Read Only 00h R/W 00h R/W 00h R/W FFh R/W 11/125 1 11 Page

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