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PDF LM1253 Data sheet ( Hoja de datos )
| Número de pieza | LM1253 | |
| Descripción | Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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May 2000
LM1253A
Monolithic Triple 180 MHz I2C CRT Pre-amp With
Integrated Analog On Screen Display (OSD) Generator
General Description
The LM1253A pre-amp is an integrated high voltage triple
CRT pre-amp and Analog On Screen Display (OSD) genera-
tor. The IC is I2C controlled, and allows control of all the pa-
rameters necessary to setup and adjust the brightness and
contrast in the CRT display. In addition, it provides a pro-
grammable period vertical blanking pulse which is used to
blank the G1.
The LM1253A pre-amp is designed to work in cooperation
with the LM2453 driver, and provides a multiplexed video
signal (VideoPlex) interface to enable the DC clamp levels at
the cathode to be varied in order to set up the CRT bias and
to allow individual adjustment for brightness.
The Analog OSD has a selectable palette allowing a wide se-
lection of colors. The preset level of the OSD can be con-
trolled by I2C to suit different CRT displays. The OSD signal
is internally mixed with the video signal, before the gain sec-
tion, and thus gives excellent white tracking of the OSD with
the white color point setting of the video.
The Brightness settings are also mixed into the video signal
before the gain matching controls and consequently give ex-
cellent white color point tracking with variations in the Bright-
ness control. An active horizontal blanking signal is added to
the video at the output, giving excellent smear performance,
and preventing video content dependent DC bias offsets as
a result of high frequency over shoot.
The OSD horizontal sync and blanking signal is derived from
a positive going flyback pulse. The digital section provides
easy interfacing of this signal with the deflection circuits.
The vertical blanking signal is taken from the vertical sync
signal, and the blanking duration is programmable. This sys-
tem is highly integrated and requires a minimal number of
external components.
Black level clamping of the signal is carried out directly on
the AC coupled input signal into the high impedance pream-
plifier input, thus eliminating the need for additional black
level clamp capacitors.
The outputs are referenced to a DC level produced by the
LM1253A Pre-amp, and so are guaranteed to provide stable
DC operating levels within the system without the need for
additional external feedback components.
The IC is packaged in an industry standard wide body 28-
lead DIL molded plastic package.
Features
n 190 two-color ROM based Character Fonts
n 64 four-color ROM based Character Fonts
n Supports a programmable page size with up to 512
characters and line definition codes
n Support for 2 Display Windows (size of each window is
configurable)
n Programmable start position for each Display Window
n Programmable Resolutions: from 512 to 960 pixels per
line in 64 pixel increments
n Programmable Character Height, with automatic height
control with mode change
n Programmable Row Spacing between each display
character row
n Maximum Pixel clock of 92.2 MHz
n I2C compatible interface to controlling micro-controller
n Button boxes
n 180 MHz preamplifier with full video signal parametric
control
n VideoPlex™ interface to the LM2453 driver
n OSD mixing with 64 out of 512 color mask
programmable selection
Intended Applications
n 1280 x 1024 Displays up to 75 Hz requiring OSD
capability
© 2000 National Semiconductor Corporation DS101265
www.national.com
1 page  
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, (VCC)
Input Voltage, (VIN)
Storage Temperature Range, (TSTG)
TJMAX
6V
6V
−65˚C to +150˚C
150˚C
Lead Temperature (Soldering, <10 sec.)
ESD Tolerance, Human Body Model
Machine Model
300˚C
3 kV
300V
Operating Ranges (Note 2)
Temperature Range
VCC
0˚C to +70˚C
+4.75V to +5.25V
Active Video Signal Electrical Characteristics
(See Figure 3 for Test Circuit, and Table 1 for Control Test Settings Chart)
Unless otherwise noted: VCC = +5V, VIN = 0.7V, CL = 8 pF, Video Signal Output = 1 VPP, TA = 25˚C, VABL = VCC.
Symbol
Parameter
Conditions
LM1253A
Min Typ Max
ICC1MAX
VOUT BLK
Maximum Supply Current
Active Video Black Level Minimum
Output Voltage
Test Setting 1, No Output Load
Test Setting 1, No AC Input Signal
245
VREF
LE Linearity Error
Test Setting 3, (Note 4), Triangular
Step Signal Input
1
VOUT WHITE
Active Video White Level Max
Output Voltage
Test Setting 3, AC Input Signal
2.7
tr Rise Time
Test Setting 3, (Note 5), 10% to
90%, AC Input Signal
3.0
tf Fall Time
Test Setting 3, (Note 5), 90% to
10%, AC Input Signal
3.0
OSR
Rising Edge Overshoot
Test Setting 3, (Note 5), AC Input
Signal
5
OSF
Falling Edge Overshoot
Test Setting 3, (Note 5), AC Input
Signal
5
f(−3dB)
Video Amplifier Bandwidth
Measured in AC2DC002 Demo
Board. LM1253A set for 40 VPP
swing at LM2453 output
180
ACONTRAST
Contrast Max-Min Adjustment
Range
Test Setting 2, AC Input Signal
20
AGAIN
AMAX
VABL TH
Gain Max-Min Adjustment Range
Max Signal Voltage Gain
Auto Beam Limit Control Upper
Limit
Test Setting 2, AC Input Signal
Test Setting 2, AC Input Signal
Test Setting 3, (Note 6), AC Input
Signal
10
1.8
4.5
VABL RANGE
Auto Beam Limit Control Voltage
Range
Test Setting 3, (Note 6), AC Input
Signal
3
∆AABL
Auto Beam Limit Control Range
Test Setting 3, (Note 6), AC Input
Signal
−10
IABL MAX
Auto Beam Limit Input Current
Sink Capability
Test Setting 3, (Note 6), AC Input
Signal
1
CIP
VREF
XT
Input AC Coupling Capacitor
Typical VREF Output Voltage
Channel to Channel Crosstalk
Test Setting 3
10 MHz
4.7
1.55 1.65 1.75
40
Units
mA
VDC
%
V
ns
ns
%
%
MHz
dB
dB
V/V
V
V
dB
mA
nF
V
dB
5 www.national.com
5 Page 
Pin Descriptions (Continued)
FIGURE 9. H Flyback Input Pulse
DS101265-13
RLIMITH is set to limit the input current into the IC to a maxi-
mum value of +1 mA during flyback and −150 µA during nor-
mal forward scan. For example if an h flyback with a peak of
100V is used, RLIMITH = 100 kΩ.The internal input imped-
ance of pin 14 is low to limit the maximum voltage swing at
the input to within the supply rail and ground. The IC inter-
face circuit creates a digital signal from this waveform, which
is used as the blanking signal, and termed HBLANK. This
signal is used by the video amplifier for blanking the video
and by the OSD generator as the horizontal sync reference
for the PLL.
Loss of the horizontal flyback pulse implies that the monitor
is not scanning, and therefore no image is being displayed.
The HBLANK pulse is still required by the LM2453 CRT
driver in order to maintain correct bias conditions in the CRT
until the power supplies are switched off, but video will be set
at black level to prevent front of screen problems, using the
NO_VID line. See also the Loss of Horizontal Flyback sec-
tion.
Figure 29 shows the external schematic of pin 14, Figure 18
shows the internal schematic.
Pin 15 — V Flyback This is an analog signal from the moni-
tor vertical scan. The analog waveform is AC coupled and
fed to the input of the IC via a current limiting resistor to pre-
vent the positive and negative excursions of the signal caus-
ing excessive current or voltage swing at the input to the IC.
See Figure 10.
RLIMITV is set to limit the maximum input voltage swing into
the IC to less than the supply rails. The input to the IC is
positive edge triggered, and ignores the falling edge. Be-
cause of horizontal rate noise on the waveform, the input
buffer incorporates hysteresis, triggering at a positive going
threshold of VVTH+ and a negative going threshold of VVTH.
The input buffer produces a digital signal VSTART which is
used to start the VBLANK timer. The positive rising edge of
VSTART sets a counter timer, which counts horizontal peri-
ods using the HBLANK signal. The timer resets VBLANK
when it reaches the value preset in the register VCOUNT
(set by the micro-controller over I2C). While the output
VBLANK is active, an AND function prevents any further
transitions on the VSTART waveform from retriggering the
counter.
The positive edge of the VSTART signal is initially transmit-
ted through to VBLANK through an OR function, as the timer
may take up to one horizontal line period to begin timing the
duration of the pulse. The application must ensure that the
11 www.national.com
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| PDF Descargar | [ Datasheet LM1253.PDF ] | |
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