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PDF DS1859 Data sheet ( Hoja de datos )
| Número de pieza | DS1859 | |
| Descripción | Temperature-Controlled Resistors | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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Rev 1; 11/03
Dual,www.DataSheet4U.com Temperature-Controlled Resistors with
Internally Calibrated Monitors
General Description
The DS1859 dual, temperature-controlled, nonvolatile
(NV) variable resistors with three monitors consists of
two 50kΩ or two 20kΩ, 256-position, linear, variable
resistors; three analog monitor inputs (MON1, MON2,
MON3); and a direct-to-digital temperature sensor. The
device provides an ideal method for setting and tem-
perature-compensating bias voltages and currents in
control applications using minimal circuitry. The vari-
able resistor settings are stored in EEPROM memory
and can be accessed over the 2-wire serial bus.
Applications
Optical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
Typical Operating Circuit
VCC
4.7kΩ
2-WIRE
INTERFACE
Tx-FAULT
LOS
GROUND TO
DISABLE WRITE
PROTECT
VCC = 3.3V
4.7kΩ
1
SDA
2
SCL
3
OUT1
4
IN1
5
OUT2
6
IN2
7
WPEN
8
GND
DS1859
16
VCC
H1 15
14
L1
13
H0
L0 12
0.1µF
DECOUPLING
CAP
TO LASER BIAS
CONTROL
TO LASER
MODULATION
CONTROL
11 Rx POWER*
MON3
10 Tx POWER*
MON2
MON1 9 Tx BIAS*
DIAGNOSTIC
INPUTS
*SATISFIES SFF-8472 COMPATIBILITY
Features
♦ SFF-8472 Compatible
♦ Five Monitored Channels (Temperature, VCC,
MON1, MON2, MON3)
♦ Three External Analog Inputs (MON1, MON2, MON3)
That Support Internal and External Calibration
♦ Scalable Dynamic Range for External Analog Inputs
♦ Internal Direct-to-Digital Temperature Sensor
♦ Alarm and Warning Flags for All Monitored
Channels
♦ Two 50kΩ or Two 20kΩ, Linear, 256-Position,
Nonvolatile Temperature-Controlled Variable
Resistors
♦ Resistor Settings Changeable Every 2°C
♦ Access to Monitoring and ID Information
Configurable with Separate Device Addresses
♦ 2-Wire Serial Interface
♦ Two Buffers with TTL/CMOS-Compatible Inputs and
Open-Drain Outputs
♦ Operates from a 3.3V or 5V Supply
♦ Operating Temperature Range of -40°C to +95°C
Ordering Information
PART
DS1859E-050
DS1859E-020
RESISTANCE
50kΩ
20kΩ
PIN-PACKAGE
16 TSSOP
16 TSSOP
DS1859E-050/T&R
50kΩ
16 TSSOP
(Tape-and-Reel)
DS1859E-020/T&R
20kΩ
16 TSSOP
(Tape-and-Reel)
DS1859B-050
DS1859B-020
50kΩ
20kΩ
16-Ball CSBGA
16-Ball CSBGA
Pin Configurations
TOP VIEW
A IN1 SCL
VCC
H1
B OUT2 SDA
H0
L1
C WPEN IN2 OUT1 MON3
D GND L0 MON1 MON2
1234
CSBGA (4mm x 4mm)
1.0mm PITCH
1 SDA
2 SCL
3 OUT1
4 IN1
5 OUT2
6 IN2
7 WPEN
8 GND
VCC 16
H1 15
L1 14
DS1859
H0 13
L0 12
MON3 11
MON2 10
MON1 9
TSSOP
______________________________________________ Maxim Integrated Products 1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Dual,www.DataSheet4U.com Temperature-Controlled Resistors with
Internally Calibrated Monitors
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum tHD:DAT only has to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 13: CB—total capacitance of one bus line, timing referenced to 0.9 x VCC and 0.1 x VCC.
Note 14: Guaranteed by design.
Typical Operating Characteristics
(VCC = 5.0V, TA = +25°C, for both 50kΩ and 20kΩ versions, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
720
SDA = SCL = VCC
680
640
600
560
520
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
RESISTANCE vs. SETTING
20
20kΩ VERSION
15
10
5
0
0 50 100 150 200 250
SETTING (DEC)
SUPPLY CURRENT vs. VOLTAGE
700
SDA = SCL = VCC
650
600
550
500
450
400
3.0 3.5 4.0 4.5 5.0 5.5
VOLTAGE (V)
ACTIVE SUPPLY CURRENT
vs. SCL FREQUENCY
760
SDA = VCC
720
680
640
600
560
0
100 200 300
SCL FREQUENCY (kHz)
400
RESISTANCE vs. SETTING
60
50kΩ VERSION
50
40
30
20
10
0
0 50 100 150 200 250
SETTING (DEC)
RESISTOR 0 INL (LSB)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0 25 50 75 100 125 150 175 200 225 250
SETTING (DEC)
_____________________________________________________________________ 5
5 Page 
Dual,www.DataSheet4U.com Temperature-Controlled Resistors with
Internally Calibrated Monitors
Table 4. ADEN Address Configuration
ADEN
(ADDRESS
ENABLE)
NO. OF SEPARATE
DEVICE
ADDRESSES
ADDITIONAL
INFORMATION
0 2 See Figure 2
1 1 (Main Device only) See Figure 3
Table 5. ADEN and ADFIX Bits
ADEN
0
0
1
1
ADFIX
0
1
0
1
AUXILIARY
ADDRESS
A0h
A0h
N/A
N/A
MAIN ADDRESS
A2h
EEPROM
(Table 01, 8Ch)
A2h
EEPROM
(Table 01, 8Ch)
MAIN DEVICE ENABLE
AUXILIARY DEVICE ENABLE
DEC
0
95
96
127
128
143
00
AUXILIARY
DEVICE
EN
EN
MAIN
DEVICE
5Fh
60h
EN
7Fh 7Fh
TABLE SELECT
DECODER
199
TABLE 01
TABLE 02
TABLE 03
80h EN
80h EN
80h EN
MON LOOK-UP
TABLE CONTROL
R0 LOOK-UP
R1 LOOK-UP
SEL 8Fh
TABLE
TABLE
SEL C7h
SEL C7h
F0h F0h
RESERVED
RESERVED
FFh FFh
MEMORY PARTITION WITH ADEN BIT = 0
Figure 2. Memory Organization, ADEN = 0
Variable Resistors
The value of each variable resistor is determined by
a temperature-addressed look-up table, which can
assign a unique value (00h to FFh) to each resistor for
every 2°C increment over the -40°C to +102°C range
(see Table 3). See the Temperature Conversion section
for more information.
The variable resistors can also be used in manual
mode. If the TEN bit equals 0, the resistors are in manu-
al mode and the temperature indexing is disabled. The
user sets the resistors in manual mode by writing to
addresses 82h and 83h in Table 01 to control resistors
0 and 1, respectively.
Memory Description
Main and auxiliary memories can be accessed by two
separate device addresses. The Main Device address
is A2h (or value in Table 01 byte 8Ch, when ADFIX = 1)
and the Auxiliary Device address is A0h. A user option
is provided to respond to one or two device addresses.
This feature can be used to save component count in
SFF applications (Main Device address can be used)
or other applications where both GBIC (Auxiliary
Device address can be used) and monitoring functions
are implemented and two device addresses are need-
ed. The memory blocks are enabled with the corre-
sponding device address. Memory space from 80h and
____________________________________________________________________ 11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet DS1859.PDF ] | |
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