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PDF PC28F640 Data sheet ( Hoja de datos )

Número de pieza PC28F640
Descripción Embedded Flash Memory
Fabricantes Numonyx 
Logotipo Numonyx Logotipo



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No Preview Available ! PC28F640 Hoja de datos, Descripción, Manual

Numonyx™ Embedded Flash Memory
(J3 v. D)www.DataSheet4U.com
32, 64, 128, and 256 Mbit
Product Features
Datasheet
„ Architecture
— High-density symmetrical 128-Kbyte blocks
— 256 Mbit (256 blocks)
— 128 Mbit (128 blocks)
— 64 Mbit (64 blocks)
— 32 Mbit (32 blocks)
„ Performance
— 75 ns Initial Access Speed (128/64/32
-Mbit densities)
— 95 ns Initial Access Speed (256 Mbit only)
— 25 ns 8-word and 4-word Asynchronous
page-mode reads
— 32-Byte Write buffer
— 4 µs per Byte Effective programming time
„ Security
— Enhanced security options for code
protection
— 128-bit Protection Register
— 64-bit Unique device identifier
— 64-bit User-programmable OTP cells
— Absolute protection with VPEN = GND
— Individual block locking
— Block erase/program lockout during power
transitions
„ Software
— Program and erase suspend support
— Flash Data Integrator (FDI), Common Flash
Interface (CFI) Compatible
„ System Voltage and Power
— VCC = 2.7 V to 3.6 V
— VCCQ = 2.7 V to 3.6 V
„ Packaging
— 56-Lead TSOP package (32, 64, 128 Mbit
only)
— 64-Ball Numonyx Easy BGA package (32,
42, 128 and 256 Mbit)
„ Quality and Reliability
— Operating temperature:
-40 °C to +85 °C
— 100K Minimum erase cycles per block
— 0.13 µm ETOX™ VIII Process
308551-05
November 2007

1 page




PC28F640 pdf
Numonyx™ Embedded Flash Memory (J3 v. D)
Revision History
Date
July 2005
September 2005
www.DataSheet4U.com
February 2006
February 2007
November 2007
Revision Description
001
002
003
004
05
Initial release
Changed Marketing name from 28FxxxJ3 to J3 v. D.
Updated the following:
Table 18, “Command Bus Operations” on page 35
Section 9.2.2, “Read Status Register” on page 38
Section 9.3.2, “Buffered Programming” on page 39
Table 24, “Valid Commands During Suspend” on page 41
Added Table 25, “STS Configuration Register” on page 42.
Section 5.3.1, “Power-Up/Down Characteristics” on page 20 was modified.
Notes on Table 8, “DC Voltage Characteristics” on page 22 were updated
Table 10, “Read Operations” on page 23 was updated with R16 value
Table 12, “Configuration Performance” on page 29 was updated
Note 1 of Table 26, “STS Configuration Coding Definitions” on page 43 was updated.
Added 256-Mbit; Updated format.
Applied Numonyx branding.
November 2007
308551-05
Datasheet
5

5 Page





PC28F640 arduino
Numonyx™ Embedded Flash Memory (J3 v. D)
2.2 Memory Map
Figure 3: Numonyx™ Embedded Flash Memory (J3 v. D) Memory Map
www.DataSheet4U.com
A[24-0]: 256 Mbit
A [23-0]:128 Mbit
A [22-0]: 64 Mbit
A [21-0]: 32 Mbit
1FFFFFF
1FE0000
128-Kbyte Block 255
A[24-1]: 256 Mbit
A [23-1]: 128 Mbit
A [22-1]: 64 Mbit
A [21-1]: 32 Mbit
FFFFFF
FF0000
64-Kword Block 255
0FFFFFF
0FE0000
128-Kbyte Block 127
7FFFFF
7F0000
64-Kword Block 127
07FFFFF
07E0000
128-Kbyte Block 63
03FFFFF
03E0000
128-Kbyte Block 31
003FFFF
0020000
001FFFF
0000000
128-Kbyte Block 1
128-Kbyte Block 0
Byte-Wide (x8) Mode
3FFFFF
3F0000
64-Kword Block 63
1FFFFF
1F0000
64-Kword Block 31
01FFFF
00100F0F0F0F
000000
64-Kword Block
64-Kword Block
1
0
Word Wide (x16) Mode
November 2007
308551-05
Datasheet
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