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PDF 89VRD2 Data sheet ( Hoja de datos )

Número de pieza 89VRD2
Descripción P89VRD2
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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P89V51RD2
8-bit 80C51 5 V low power 64 kB Flash microcontroller
with 1 kB RAM
Rev. 01 — 01 March 2004
Product data
1. General description
www.DataSheet4U.com
The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of
data RAM.
A key feature of the P89V51RD2 is its X2 mode option. The design engineer can
choose to run the application with the conventional 80C51 clock rate (12 clocks per
machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice
the throughput at the same clock frequency. Another way to benefit from this feature
is to keep the same performance by reducing the clock frequency by half, thus
dramatically reducing the EMI.
The Flash program memory supports both parallel programming and in serial
In-System Programming (ISP). Parallel programming mode offers gang-programming
at high speed, reducing programming costs and time to market. ISP allows a device
to be reprogrammed in the end product under software control. The capability to
field/update the application firmware makes a wide range of applications possible.
The P89V51RD2 is also In-Application Programmable (IAP), allowing the Flash
program memory to be reconfigured even while the application is running.
2. Features
s 80C51 Central Processing Unit
s 5 V Operating voltage from 0 to 40 MHz
s 64 kB of on-chip Flash program memory with ISP (In-System Programming) and
IAP (In-Application Programming)
s Supports 12-clock (default) or 6-clock mode selection via software or ISP
s SPI (Serial Peripheral Interface) and enhanced UART
s PCA (Programmable Counter Array) with PWM and Capture/Compare functions
s Four 8-bit I/O ports with three high-current Port 1 pins (16 mA each)
s Three 16-bit timers/counters
s Programmable Watchdog timer (WDT)
s Eight interrupt sources with four priority levels
s Second DPTR register
s Low EMI mode (ALE inhibit)
s TTL- and CMOS-compatible logic levels

1 page




89VRD2 pdf
Philips Semiconductors
P89V51RD2
8-bit microcontrollers with 80C51 core
www.DataSheet4U.com
handbook, halfpage
T2/P1.0 1
T2EX/P1.1 2
ECI/P1.2 3
CEX0/P1.3 4
CEX1/SS/P1.4 5
CEX2/MOSI/P1.5 6
CEX3/MISO/P1.6 7
CEX4/SCK/P1.7 8
RST 9
RXD/P3.0 10
TXD/P3.1 11
INT0/P3.2 12
INT1/P3.3 13
T0/P3.4 14
T1/P3.5 15
WR/P3.6 16
RD/P3.7 17
XTAL2 18
XTAL1 19
VSS 20
Fig 3. PDIP40 pin configuration.
40 VDD
39 P0.0/AD0
38 P0.1/AD1
37 P0.2/AD2
36 P0.3/AD3
35 P0.4/AD4
34 P0.5/AD5
33 P0.6/AD6
32 P0.7/AD7
31 EA
30 ALE/PROG
29 PSEN
28 P2.7/A15
27 P2.6/A14
26 P2.5/A13
25 P2.4/A12
24 P2.3/A11
23 P2.2/A10
22 P2.1/A9
21 P2.0/A8
002aaa811
9397 750 12964
Product data
Rev. 01 — 01 March 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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89VRD2 arduino
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Table 4: Special function registers
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
MSB
Bit functions and addresses
LSB
Bit address E7 E6 E5 E4 E3 E2 E1 E0
ACC*
Accumulator
E0H
AUXR
Auxiliary function register
8EH -
-
-
-
-
-
EXTRAM
AO
AUXR1
Auxiliary function register 1
A2H -
-
-
GF2 0
- DPS
Bit address
F7
F6
F5
F4
F3
F2
F1
F0
B* B register
F0H
CCAP0H Module 0 Capture HIGH
FAH
CCAP1H Module 1 Capture HIGH
FBH
CCAP2H Module 2 Capture HIGH
FCH
CCAP3H Module 3 Capture HIGH
FDH
CCAP4H Module 4 Capture HIGH
FEH
CCAP0L Module 0 Capture LOW
EAH
CCAP1L Module 1 Capture LOW
EBH
CCAP2L Module 2 Capture LOW
ECH
CCAP3L Module 3 Capture LOW
EDH
CCAP4L Module 4 Capture LOW
EEH
CCAPM0 Module 0 Mode
DAH - ECOM_0 CAPP_0 CAPN_0 MAT_0 TOG_0 PWM_0 ECCF_0
CCAPM1 Module 1 Mode
DBH - ECOM_1 CAPP_1 CAPN_1 MAT_1 TOG_1 PWM_1 ECCF_1
CCAPM2 Module 2 Mode
DCH - ECOM_2 CAPP_2 CAPN_2 MAT_2 TOG_2 PWM_2 ECCF_2
CCAPM3 Module 3 Mode
DDH - ECOM_3 CAPP_3 CAPN_3 MAT_3 TOG_3 PWM_3 ECCF_3
CCAPM4 Module 4 Mode
DEH - ECOM_4 CAPP_4 CAPN_4 MAT_4 TOG_4 PWM_4 ECCF_4
Bit address DF DE DD DC DB DA D9 D8
CCON*
PCA Counter Control
D8H
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
CH PCA Counter HIGH
F9H
CL PCA Counter LOW
E9H
CMOD
PCA Counter Mode
D9H
CIDL
WDTE
-
-
-
CPS1
CPS0
ECF
DPTR
Data Pointer (2 bytes)
DPH
Data Pointer HIGH
83H
DPL Data Pointer LOW
82H

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