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PDF R8A66160SP Data sheet ( Hoja de datos )

Número de pieza R8A66160SP
Descripción 16-BIT LED DRIVER
Fabricantes Renesas Technology 
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No Preview Available ! R8A66160SP Hoja de datos, Descripción, Manual

R8A66160DD/SP
16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH
REJ03F0261-0100
Rev. 1.00
Jan.10. 2008
DESCRIPTION
R8A66160 is a LED array driver having a 16-bit serial input and parallel output shift register function with
direct coupled reset input and output latch function.
This product guarantees the output current of 24mA (Vcc =5V case) which is sufficient for cathode common
LED drive, capable of following 16-bits continuously at the same time. Parallel output is open drain output.
In addition, as this product has been designed in complete CMOS, power consumption can be greatly
reduced when compared with conventional BIPOLAR or Bi-CMOS products. Furthermore, pin layout ensures
the realization of an easy printed circuit. R8A66160 is the succession product of M66310.
www.DataSheetF4UE.cAomTURES
Cathode common LED drive
VCC 5V or 3.3V single power supply
High output current: all parallel outputs QA~QP IOH=-24mA (at VCC =5.0V) IOH=-12mA (at VCC =3.3V)
simultaneous lighting available
Low power dissipation: 100uW/package (max) (Vcc=5.0V, Ta=25oC, quiescent state)
High noise margin: Schmitt input circuit provides responsiveness to a long line length
Equipped with direct-coupled reset
Open drain output: (except serial data output SQP)
Wide operating temperature range: Ta=-40oC~+85oC
Pin layout facilitates printed circuit wiring. (This layout facilitates cascade connection and LED connection)
APPLICATION
LED array drive, The various LED display modules
PPC, Printer, VCR, Mini-compo, Button-Telephone etc. All of LED display equipment
BLOCK DIAGRAM
LOGIC DIAGRAM
PARALLEL DATA OUTPUTS
SERIAL
DATA
OUTPUT
QA QB QC QD QE QF QG QH QI QJ QK QL QM QN QO QP
1 2 24 23 22 21 20 19 18 17 16 15 14 13 11 12
SQP Vcc
10 3
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
Q
CK
DR
54
OE A
ENABLE SERIAL
INPUT DATA
INPUT
DATA signal
OE signal
PARALLEL
DATA
OUTPUTS
QA QP
OUTPUT FORMAT
SERIAL
DATA
OUTPUT
SQP
8 76 9
CKS R CKL GND
SHIFT DIRECT LATCH
CLOCK RESET CLOCK
INPUT INPUT INPUT
REJ03F0261-0100 Rev.1.00 Jan.10.2008
page 1 of 7
.

1 page




R8A66160SP pdf
R8A66160DD/SP
SWITCHING CHARACTERISTICS (Ta=-40~+85oC,Vcc=5.0V or 3.3V)
Symbol
Parameter
fmax
tPLH
tPHL
tPHL
tPHZ
tPZH
tPHZ
tPZH
www.DataSheet4U.com
tPHZ
CI
Maximum clock frequency
Output “L”-“H” and “H”-“L”
propagation time
Output “H”-“L”
propagation time
Output “H”-“Z”
propagation time
Output “Z”-“H”
propagation time
Output “H”-“Z”
propagation time
Output “Z”-“H”
propagation time
Output “H”-“Z”
propagation time
Input capacitance
CKS - SQP
R - SQP
R - QA ~ QP
(turned off)
CKL - QA ~ QP
(turned on)
CKL - QA ~ QP
(turned off)
OE - QA ~ QP
(turned on)
OE - QA ~ QP
(turned off)
Test
conditions
5.0V specification
Min. Typ. Max.
4
125
125
125
3.3V specification
Min. Typ. Max.
3.3
150
150
150
Unit
MHz
ns
ns
ns
CL=50pF
RL=1K
(Note 4)
200 220 ns
125 150 ns
200 220 ns
125 150 ns
200 220 ns
10 10 pF
TIMING REQUIREMENTS (Ta=-40~+85oC,Vcc=5.0V or 3.3V)
Symbol
Parameter
tw CKS, CKL, R pulse width
tsu A setup time with respect to CKS
tsu CKS setup time with respect to CKL
th A hold time with respect to CKS
trec R recovery time with respect to CKS, CKL
Test
conditions
(Note 4)
5.0V specification
Min. Typ. Max.
125
125
125
15
70
3.3V specification
Min. Typ. Max.
150
150
150
20
80
Unit
ns
ns
ns
ns
ns
Note4 : Test Circuit
INPUT
VCC
DUT
QA QP
PG
SQP
CL RL
50
GND
CL
(1) The pulse generator (PG) has the following characteristics (10%~90%) : tr=6ns,tf=6ns
(2) The capacitance CL includes stray wiring capacitance and the probe input capacitance.
REJ03F0261-0100 Rev.1.00 Jan.10.2008
page 5 of 7
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