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Número de pieza | R8A20110BG | |
Descripción | Network Signature Matching Co-Processor | |
Fabricantes | Renesas Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de R8A20110BG (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! R8A20110BG (MARIE)
Network Signature Matching Co-Processor
(1 M-bit Full Ternary CAM)
REJ03H0002-0100
Rev.1.00
Feb 21, 2005
Description
“MARIE” is a new RENESAS Ternary CAM co-processor targeted for the network packet classification and signature
matching application. MARIE’s 1 M-bit special features, small package and reduced pin count interface makes it
www.DataSheets4uUi.tcaobmle for cost sensitive platforms. MARIE provides a 36-bit Data bus SSTL-2 interface and is able to achieve 100
Msps in Turbo Mode. During normal search mode MARIE performs 50 Msps at 144-bit lookup. A special shifted
payload algorithm for the signature matching makes MARIE a perfect fit for IDS applications.
Features
• 1 M-bit full ternary CAM
• 100 Msps max. 144-bit LU/288-bit LU with Turbo Search
• 50 Msps max. 144-bit LU with Normal Search
• 25 Msps max. 288-bit LU with Normal Search
• Shifting payload for signature matching application.
• 36-bit DQ interface (reduced pin count interface)
• Priority encoder
• IEEE 1149.1 test port
• 2.5 V/1.5 V power supply
• SSTL-2 interface
• 1.7 × 1.7 mm, 1 mm pitch 256 PBGA
Rev.1.00 Feb 21, 2005 page 1 of 8
1 page R8A20110BG (MARIE)
7. Turbo Mode with Shifting Payload
When performing unanchored searches on the payload data the turbo mode can be useful. In this mode an internal
shifting algorithm helps increase the bandwidth at the IO and also eases the host processing.
Once the Turbo Data Shift Register (TDSR) is full MARIE performs a search and automatically shifts the key 1-
byte per clock, executing one search per clock until a match is found or the register empties. The user would update
the Turbo Data Register (TDR) (usually every 36 cycles). No redundant payload data is inputted from the host
MARIE allowing for a bandwidth increase (in 36-bit mode) and easing the host processing.
Additionally the user can provide a header. The header is a register that is kept constant over the search operation.
These registers are HDR0 (2B) and HDR1 (16B). In the 144-bit lookup size mode HDR0 or no header can be useful.
In the 288-bit lookup size mode HDR0, HDR1, or no header could be selected. The header user mode is selected in
the ST register.
The search result occurs on every clock. The user receives the return data via the IND pin
The performance limit of that Turbo Search Mode is
100 Msps in 144-bit lookup
www.DataSheet4U.com100 Msps in 288-bit lookup
Packet contents
A B c d E f G H Warning! XYZ apple orange
Payload offset0
Payload offset1
Payload offset2
Payload offset3
Payload offset4
Payload offset5
Payload offset6
Payload offset7
Payload offset8
Payload offset9
ABcdEfGH
BcdEfGHW
cdEfGHWa
dEfGHWar
EfGHWarn
fGHWarni
GHWarnin
HWarning
Warning!
arning!X
Figure 4 Shifted Payload Search
HIT
IN
Offset
Header-0
Header-1
TDSR
TDR
Header select
Shifted payload
Combined Search Data
Header
Payload
Full Ternary CAM Array
OUT
Figure 5 Turbo Search Mode
Rev.1.00 Feb 21, 2005 page 5 of 8
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet R8A20110BG.PDF ] |
Número de pieza | Descripción | Fabricantes |
R8A20110BG | Network Signature Matching Co-Processor | Renesas Technology |
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