|
|
PDF GL646USB Data sheet ( Hoja de datos )
| Número de pieza | GL646USB | |
| Descripción | Three-in-one Scanner Controller | |
| Fabricantes | GENESYS | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de GL646USB (archivo pdf) en la parte inferior de esta página. Total 44 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
GeneScanTMII
GL646USB
Three-in-one Scanner Controller
for USB and 1394
Rev. 1.4
Aug. 13, 02’
Genesys Logic, Inc.
10F, No.11, Ln.155, Sec. 3, Peishen Rd., Shenkeng, Taipei, Taiwan
Tel: +886-2-2664-6655 Fax: +886-2-2664-5757
http://www.genesyslogic.com/
1 page  
3. SYSTEM BLOCK DIAGRAM
3.1 USB 1.1 System Block Diagram
HOST
12MHz
www.DataSheet4U.com
Three-in-One
Scanner
Controller
(GL646USB)
DRAM
3.2 USB 2.0 System Block Diagram
12MHz
USB 2.0
Controller
24~48MHz
Three-in-One
Scanner
Controller
(GL646USB)
DRAM
3.3 IEEE 1394 System Block Diagram
CCD/CIS
Motor Driver
IO Device
CCD/CIS
Motor Driver
IO Device
GL646USB
HOST
25MHz
PHY
IEEE 1394
Controller
12MHz
Three-in-One
Scanner
Controller
(GL646USB)
CCD/CIS
Motor Driver
IO Device
DRAM
Note: 1.The pins assignment and package of GL646 USB is the same as GL643USB.
2.The connection of GL646USB is the same as GL643USB.
3.GL643USB is 14 bits solution; GL646USB is 16 bits solution.
Rev. 1.4
-4-
5 Page 
BSMP(CDSCLK1)
SCLK
SENLOAD
MCLK(ADCCLK)
SDI
www.DataSheet4U.com SDO
DBUS0~15
ABUS0~8
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
TSTMOD
TSTSEL0
TSTSEL1
MPU_SEL
MTR_SEL
IX1
IOX2
CKSEL
MPUCLOE
MPUCLK
EXTRST_
AVDD
AVSS
AGND
DVDD
DGND
GL646USB
This signal is applied synchronously with MCLK to specify the point of time that
the input is sampled.
Analog Device type : CDS image sampling clock
O Analog Device type : Black level sampling clock
O Serial interface clock output for Front-end
O Serial interface data latch-in signal for Front-end
Wolfson type : Master clock.
This clock is applied at either six or three times the input pixel rate depending on
O
the operational mode.
Analog Device type: ADC Converter sampling clock
O Serial interface data output signal for Front-end
I Serial interface data input signal for Front-end
DRAM
B DRAM data bus
O DRAM address bus
O DRAM RAS signal of first memory chip
O DRAM CAS signal of first memory chip
O DRAM OE(output enable) signal of first memory chip
O DRAM WE signal of first memory chip
O DRAM RAS signal of second memory chip
O DRAM CAS signal of second memory chip
O DRAM OE(output enable) signal of second memory chip
O DRAM WE signal of second memory chip
Miscellaneous
Test mode selection pins :
{TSTMOD,TSTSEL0,TSTSEL1,MPU_SEL}=
I
0000 : mode1 0100 : mode2 0011 : mode3 0010 : mode4 0110 : mode5
100x : mode6 110x : mode7 101x : mode8 1110 : mode9
I
MTR_SEL=1 select Bi_polar
MTR_SEL=0 select Uni_polar
I Clock input for crystal
O Clock output for crystal
I Scanner controller clock selection
O Clock output
I Hardware reset input
POWER
P Analog power input
P Analog ground input
P Analog ground input for USB1.1
P Digital power input
P Digital ground input
Rev. 1.4
-10-
11 Page | ||
| Páginas | Total 44 Páginas | |
| PDF Descargar | [ Datasheet GL646USB.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| GL646USB | Three-in-one Scanner Controller | GENESYS |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |