PDF ICS83026I Data sheet ( Hoja de datos )

Número de pieza	ICS83026I
Descripción	1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Fabricantes	Integrated Circuit Systems
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No Preview Available ! Integrated Circuit Systems, Inc. ICS83026I LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER GENERAL DESCRIPTION ICS The ICS83026I is a low skew, 1-to-2 Differ- ential-to-LVCMOS/LVTTL Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™family of High Performance Clock Solutions from ICS.The differential input can accept most differential sig- nal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and translate to two single-ended LVCMOS/LVTTL outputs with a maximum output skew of 20ps. The small 8-lead SOIC foot- www.DataSheept4rUin.ct ommakes this device ideal for use in applications with lim- ited board space. FEATURES • 2 LVCMOS / LVTTL outputs • Differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Output frequency: 350MHz (typical) • Output skew: 20ps (maximum) • Part-to-part skew: 600ps (maximum) • Small 8 lead SOIC package saves board space • 3.3V operating supply • -40°C to 85°C ambient operating temperature • Lead-Free package available • Pin-to-pin compatible with MC100EPT26 BLOCK DIAGRAM CLK nCLK Q0 Q1 PIN ASSIGNMENT nc CLK nCLK nc 1 2 3 4 8 VDD 7 Q0 6 Q1 5 GND ICS83026I 8-Lead SOIC 3.8mm x 4.8mm, x 1.47mm package body M Package Top View 83026AMI www.icst.com/products/hiperclocks.html 1 REV. B NOVEMBER 9, 2004 1 page Integrated Circuit Systems, Inc. ICS83026I LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER PARAMETER MEASUREMENT INFORMATION 1.65V±0.15V VDD www.DataSheet4U.LcVomCMOS GND -1.65V±0.15V SCOPE Qx VDD nCLK CLK V PP GND Cross Points 3.3VCORE/3.3V OUTPUT LOAD AC TEST CIRCUIT V DDO Qx 2 V DDO Qy 2 t sk(o) DIFFERENTIAL INPUT LEVEL PART 1 Qx V DDO 2 PART 2 Qy V DDO 2 t sk(pp) V CMR OUTPUT SKEW nCLK CLK Q0, Q1 VDDO 2 t PD PROPAGATION DELAY PART-TO-PART SKEW 20% Clock Outputs 80% tR OUTPUT RISE/FALL TIME Q0, Q1 V DDO 2 Pulse Width t PERIOD odc = t PW t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 83026AMI www.icst.com/products/hiperclocks.html 5 80% tF 20% REV. B NOVEMBER 9, 2004 5 Page Integrated Circuit Systems, Inc. ICS83026I LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER Rev Table A T2 B www.DataSheet4U.com T7 Page 1 1 2 6-7 11 REVISION HISTORY SHEET Description of Change Revised General Description. Added Lead-Free bullet to Features section. Pin Characteristics Table - changed CIN from 4pF max. to 4pF typical and added 5Ω min. & 12Ω max. to ROUT row. Added Application Information section. Added Lead-Free P/N to Ordering Information table. Date 8/9/02 11/9/04 83026AMI www.icst.com/products/hiperclocks.html 11 REV. B NOVEMBER 9, 2004 11 Page

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Número de pieza	Descripción	Fabricantes
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