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Número de pieza | TMP1942CYUE | |
Descripción | 32bit TX System RISC | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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32bit TX System RISC
TX19 family
TMP1942CYUE
TMP1942CZUE/XBG
Rev1.0 March 29, 2007
1 page TX1942CY/CZ
www.DataSheet4U.com
NMI
INT0 (PF6)
INT1∼2 (PE6∼7)
INT3∼4 (PA0∼1)
INT5∼6 (PA3∼4)
INT7 (PB7)
INT8∼A (PC0∼2)
AN0∼7 (P50∼57)
AN8∼15 (P60∼67)
ADTRG (P57)
AVCC/AVSS
VREFH/VREFL
DAOUT0∼3
DAVCC/DAVSS
DAREFH
TXD0 (PD0)
RXD0 (PD1)
SCLK0/CTS0 (PD2)
TXD1 (PD3)
RXD1 (PD4)
SCLK1/CTS1 (PD5)
TXD3 (PE0)
RXD3 (PE1)
SCLK3/CTS3 (PE2)
SCK (PF3)
SO/SDA (PF4)
SI/SCL (PF5)
TXD4 (PE3)
RXD4 (PE4)
SCLK4/CTS4 (PE5)
TXD5 (PF0)
RXD5 (PF1)
SCLK5/CTS5 (PF2)
TB4IN1 (PB5),
TB0IN0∼1 (PA0∼1)
TB7IN0∼1 (P95∼96), TB1IN0∼1 (PA3∼4)
TB8IN0∼1 (PC6∼7), TB2IN0∼1 (PB0∼1)
TB9IN0∼1 (PD0∼1), TB3IN0∼1 (PB3∼4)
TBAIN0∼1 (PD5∼6),
TB4IN0 (PB2)
TB0OUT (PA2), TB4OUT (P92)
TB1OUT (PA5), TB5OUT (P93)
TB2OUT (PB2), TB6OUT (P94)
TB3OUT (PB5), TB7OUT (P97)
TA1OUT (PA6), TA7OUT (PC5)
TA3OUT (PB6), TA9OUT (PC7)
TA5OUT (PC3), TABOUT (PD5)
TA0IN (PA7),
TA2IN (PB7),
TA4IN (PC0),
TA6IN (PC1)
TA8IN (PC2)
TAAIN (PC4)
TX19 Proccessor Core
TX19 CPU
MAC
DSU
256 KBROM
(*) 16 KBRAM
ROM correction
DMAC (4ch)
CG
INTC
10-bit
ADC (16ch)
I/O Bus I/F
EBIF
10-bit
DAC (3ch)
SIO0
SIO1
PORT0
PORT1
PORT2
SIO3
SERIAL
BUS I/F
PORT3
SIO4
SIO5
16-bit TMR0-D
(14ch)
8-bit TMR0/1
∼ A/B
(12ch)
PORT4
WDT
Real-Time
Counter (RTC)
INTBCDE
KWUP
JTAG
Figure 1.1 TMP1942 Block Diagram
(*) MROM for the mask ROM
version.
CZUE/XBG:384KB
X1
X2
XT1 (PD6)
XT2 (PD7)
SCOUT (P44)
PLLOFF*
RESET*
BW0/1
INTLV (PE7)
AD0∼7 (P00∼P07)
AD8/A8∼AD15/A15 (P10∼P17)
A0/A16∼A7/A23 (P20∼P27)
RD (P30)
WR (P31)
HWR (P32)
WAIT (P33)
BUSRD (P34)
BUSAK* (P35)
R/W (P36)
P37
CS0∼CS3 (P40∼P43)
INTB∼C (PB0∼1)
INTD∼E (PB3∼4)
TMP1942CY/CZ-4
5 Page TX1942CY/CZ
Pin Name # of Pins Type
P91 1 Input/output
DSU (PCST2)
Output
KEY9
Input
P92 1 Input/output
DSU (PCST1)
Output
TB40UT
Output
P93 1 Input/output
DSU (PCST0)
Output
TB5OUT
Output
P94 1 Input/output
DSU
Output
www.DataSheet4U.c(oSmDSA0/TPC)
TB6OUT
Output
P95 1 Input/output
DSU (DBGE*)
Input
TB7IN0
P96 1 Input/output
DSU (DINT*)
Input
TB7IN1
P97 1 Input/output
DSU
Input
(DRESET)
TB7OUT
Output
PA0 1 Input/output
TB0IN0
Input
INT3
Input
PA1
TB0IN1
INT4
1 Input/output
Input
Input
PA2
TB0OUT
PA3
TB1IN0
INT5
1 Input/output
Output
1 Input/output
Input
Input
PA4
TB1IN1
INT6
1 Input/output
Input
Input
PA5
TB1OUT
PA6
TA1OUT
PA7
TA0IN
KEYA
PB0
TB2IN0
INTB
1 Input/output
Output
1 Input/output
Output
1 Input/output
Input
Input
1 Input/output
Input
Input
Function
Port 91: Programmable as input or output
DSU pin
Key on wake-up input (with internal pull-up resister) (dynamic pull-up selectable)
Port 92: Programmable as input or output
DSU pin
16-Bit Timer 4 Output: Output from 16-bit Timer 4
Port 93: Programmable as input or output
DSU pin
16-Bit Timer 5 Output: Output from 16-bit Timer 5
Port 94: Programmable as input or output
DSU pin
16-Bit Timer 6 Output: Output from 16-bit Timer 6
Port 95: Programmable as input or output
DSU pin
16-Bit Timer 7 Input 0: Count/capture trigger input to 16-bit Timer 7
Port 96: Programmable as input or output
DSU pin
16-Bit Timer 7 Input 1: Capture trigger input to 16-bit Timer 7
Port 97: Programmable as input or output
DSU pin
16-Bit Timer 7 Output: Output from 16-bit Timer 7
Port A0: Programmable as input or output
16-Bit Timer 0 Input 0: Count/capture trigger input to 16-bit Timer 0
Interrupt Request 3: Programmable to be high-level, low-level, rising-edge or
falling-edge sensitive
Port A1: Programmable as input or output
16-Bit Timer 0 Input 1: Capture trigger input to 16-bit Timer 0
Interrupt Request 4: Programmable to be high-level, low-level, rising-edge or
falling-edge sensitive
Port A2: Programmable as input or output
16-Bit Timer 0 Output: Output from 16-bit Timer 0
Port A3: Programmable as input or output
16-Bit Timer 1 Input 0: Count/capture trigger input to 16-bit Timer 1
Interrupt Request 5: Programmable to be high-level, low-level, rising-edge or
falling-edge sensitive
Port A4: Programmable as input or output
16-Bit Timer 1 Input 1: Capture trigger input to 16-bit Timer 1
Interrupt Request 6: Programmable to be high-level, low-level, rising-edge or
falling-edge sensitive
Port A5: Programmable as input or output
16-Bit Timer 1 Output: Output from 16-bit Timer 1
Port A6: Programmable as input or output
8-Bit Timer 0/1 Output: Output from 8-bit Timer 0 or 1
Port A7: Programmable as input or output
8-Bit Timer 0 Input: Input to 8-bit Timer 0
Key on wake-up input (with internal pull-up resister) (dynamic pull-up selectable)
Port B0: Programmable as input or output
16-Bit Timer 2 Input 0: Count/capture trigger input/2-phase input pulse counter input to
16-bit Timer 2
Interrupt Request B: Programmable to be high-level, low-level, rising-edge or
falling-edge sensitive
TMP1942CY/CZ-10
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet TMP1942CYUE.PDF ] |
Número de pieza | Descripción | Fabricantes |
TMP1942CYUE | 32bit TX System RISC | Toshiba Semiconductor |
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