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PDF TCC76x Data sheet ( Hoja de datos )

Número de pieza TCC76x
Descripción 32-bit RISC Microprocessor
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No Preview Available ! TCC76x Hoja de datos, Descripción, Manual

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SPECIFICATION
TCC76x
32-bit RISC
Microprocessor
For
Digital Media Player
Rev. 0.07
February 23, 2005
Preliminary

1 page




TCC76x pdf
TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
TABLE OF CONTENTS
8.2 Register Description................................................................................................................ 8-4
9 USB CONTROLLER ......................................................................................................................... 9-1
9.1 Overview ................................................................................................................................. 9-1
9.2 Register Description for USB Device Controller ..................................................................... 9-2
9.3 USB Device DMA Operation ................................................................................................. 9-13
9.3.1 OUT Endpoint DMA Operation ................................................................................... 9-13
9.3.2 IN Endpoint DMA Operation ....................................................................................... 9-13
9.4 Register Description for USB Host Controller ....................................................................... 9-14
10 UART/IrDA..................................................................................................................................... 10-1
10.1 Overview ............................................................................................................................. 10-1
10.2 Register Description............................................................................................................ 10-2
www.DataSheet4U.com11 GSIO PORT................................................................................................................................... 11-1
11.1 Overview ............................................................................................................................. 11-1
11.2 Register Description............................................................................................................ 11-2
12 MISCELLANEOUS PERIPHERALS ............................................................................................. 12-1
12.1 ADC ..................................................................................................................................... 12-1
12.1.1 Overview ................................................................................................................... 12-1
12.1.2 ADC Controller Register Description ........................................................................ 12-2
12.2 Miscellaneous Register Description.................................................................................... 12-4
13 DMA CONTROLLER ..................................................................................................................... 13-1
13.1 Overview ............................................................................................................................. 13-1
13.2 Register Description............................................................................................................ 13-2
14 LCD CONTROLLER...................................................................................................................... 14-1
14.1 Overview ............................................................................................................................. 14-1
14.2 Related Blocks .................................................................................................................... 14-2
14.3 Interrupt configuration ......................................................................................................... 14-3
14.4 STN LCD ............................................................................................................................. 14-4
14.5 TFT LCD.............................................................................................................................. 14-9
14.6 NTSC/PAL interface .......................................................................................................... 14-11
14.7 Register Description.......................................................................................................... 14-14
15 MEMORY CONTROLLER............................................................................................................. 15-1
15.1 Overview ............................................................................................................................. 15-1
15.2 SDRAM Controller............................................................................................................... 15-3
15.3 Miscellaneous Configuration............................................................................................... 15-6
15.4 External Memory Controller ................................................................................................ 15-9
15.5 Internal Memory ................................................................................................................ 15-14
16 ECC (Error Correction Code) ........................................................................................................ 16-1
16.1 Functional Description......................................................................................................... 16-1
16.2 Register Description............................................................................................................ 16-2
17 I2C CONTROLLER ....................................................................................................................... 17-1
17.1 Functional Description......................................................................................................... 17-1
17.2 Related Blocks .................................................................................................................... 17-1
17.3 Register Description............................................................................................................ 17-2
18 CAMERA INTERFACE .................................................................................................................. 18-1
18.1 Overview ............................................................................................................................. 18-1
18.2 Related Blocks .................................................................................................................... 18-2
18.3 Register Description............................................................................................................ 18-5
19 FAST GPIO.................................................................................................................................... 19-1
19.1 Description .......................................................................................................................... 19-1
20 BOOTING PROCEDURE.............................................................................................................. 20-1
20.1 Overview ............................................................................................................................. 20-1
20.2 External ROM Boot without Encryption (BM == 000) ......................................................... 20-2
20.3 USB Boot (BM == x1x)........................................................................................................ 20-3
20.4 I2C or NAND Boot (BM == 001) .......................................................................................... 20-4
20.5 External ROM Boot with Encryption (BM == 100) .............................................................. 20-6
20.6 Development mode (BM == 101)........................................................................................ 20-7
21 JTAG DEBUG INTERFACE .......................................................................................................... 21-1
21.1 Debugging with OPENice32 & AIJI Spider.......................................................................... 21-2
Preliminary
v

5 Page





TCC76x arduino
TCC76x
Specification Rev. 0.07
32-bit RISC Microprocessor for Digital Media Player
February 23, 2005
INTRODUCTION
1 INTRODUCTION
The TCC76x is a system LSI for digital media player based on the ARM940T, ARM’s proprietary 32-bit RISC CPU
core. It can decode and encode MP3 or other types of audio/voice compression/decompression standards by
software based architecture. The on-chip USB controller enables the data transmission between a personal
computer and storage device such as NAND flash, HDD, CD etc.
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Name
TCC760
TCC761
TCC763
TCC764
TCC766
TCC767
TCC768
Package
128-TQFP-1414
208-LQFP-2828
208-TBGA-1515
144-FPBGA-1010
144-FPBGA-1010
232-FPBGA-1414
225-FPBGA-1313
144-FPBGA-1010
Table 1.1 TCC76x Derivatives
Description
Minimal feature set for digital media player
TCC760 + LCD Interface + 32bit External Bus
TCC760 + 512KB NOR Flash + High performanceAudio CODEC
TCC760 + 1MB NOR Flash + High performanceAudio CODEC
TCC760 + 1MB NOR Flash + High performanceAudio CODEC + USB2.0
TCC760 + 1MB NOR Flash + USB2.0
TCC760 + 512KB NOR Flash + High performanceAudio CODEC + 2MB SDRAM
1.1 Features
• ARM940T CPU core
- 4KB instruction, 4KB data cache
- Operating up to 140MHz
• 4Kbytes of internal boot ROM with various boot procedure (NAND, UART) and security
• 64K bytes of internal SRAM for general usage
• On-chip peripherals (TCC760 and TCC761 Core Blocks)
- External Memory controller for various memories including PROM, NOR & NAND Flash, SRAM, SDRAM, DDR
SDRAM (optional), etc.
- IDE Interface for HDD or external USB 2.0 device
- USB1.1 Host & device (Full speed)
- LCD controller supporting STN, TFT type LCD as well as NTSC/PAL interface (TCC761 only)
- Video input port for CMOS sensor module interface (TCC761 / TCC760 only)
- ECC generator for SLC and MLC NAND Flash
- I2S interface for external audio CODEC
- I2S interface for CD-DSP interface
- UART/IrDA for serial host interface
- GSIO for supporting various serial interfaces
- GPIO for various purposes
- Support 4 external interrupts
- I2C compatible serial bus
- 2-Channel DMA for transferring a bulk of data
- Four 16bit timer/counters with PWM output and two 20bit timers
- 32-bit 1Hz counter
- General purpose 10-bit ADC
- JTAG interface for code debugging
• 4 or 8Mbits of NOR Flash (TCC763 ~ TCC768)
• High performance Audio CODEC (TCC763, TCC764, TCC766 and TCC768)
- Highly Efficient Headphone Driver
- Microphone Input
Preliminary
1-1

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