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PDF XE88LC04 Data sheet ( Hoja de datos )

Número de pieza XE88LC04
Descripción Ultra Low Power MCU
Fabricantes Xemics 
Logotipo Xemics Logotipo



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No Preview Available ! XE88LC04 Hoja de datos, Descripción, Manual

Preliminary Datasheet XE88LC04
Low Power Microcontroller
www.DataSheet4U.com
XE88LC04
Ultra low-power MCU with LCD driver
General Description
• The XE88LC04 is an ultra low-power low-voltage
microcontroller unit (MCU) with extremely high effi-
ciency, allowing for 1 MIPS at 300uA and 2.4 V, and
8 x 8 bits multiplying in one clock cycle at 1.2 V.
• The XE88LC04 includes an LCD driver for up to 120
segments. The LCD lines can be used as additional
IOs.
• XE88LC04 is available with on chip ROM or Multi-
ple-Time-Programmable (MTP) program memory.
Applications
• Portable, battery operated instruments
• RF system supervisor
• Remote control
• HVAC control
• Watches
Key product Features
• Low-voltage low-power controller operation
• 4 MIPS at 2.4 V to 5.5 V supply (ROM)
• 2 MIPS at 2.4 V to 5.5 V supply (MTP)
• 300 µA at 1 MIPS, 2.4 V to 5.5 V supply
• 22 kByte (8 kInstruction) MTP, 1032 Byte RAM
• RC and crystal oscillators
• 5 reset, 16 interrupt, 8 event sources
• 120 segments LCD driver
• 100 years MTP Flash retention at 55°C
Ordering Information
Product Temperature range Memory type Package
XE88LC04MI03x
-40°C to 85 °C
MTP
BGA
Cool Solutions for Wireless Connectivity
XEMICS SA email: [email protected] web: www.xemics.com

1 page




XE88LC04 pdf
Preliminary Datasheet XE88LC04
Low Power Microcontroller
4 CPU
www.DataSheet4U.com
The XE88LC06 CPU is a low power RISC core. It has 16 internal registers for efficient imple-
mentation of the C compiler. Its instruction set is made of 35 generic instructions, all coded on
22 bits, with 8 addressing modes. All instructions are executed in one clock cycle, including
conditional jumps and 8x8 multiplication, therefore the XE88LC06 runs at 1 MIPS on a 1 MHz
clock.
The CPU description with its instruction set can be found in the XE8000 databook.
The good code efficiency of the XE8000 core makes it possible to compute a polynomial like
Z = (A0 + A1 Y) ⋅ X + B0 + B1 Y in less than 300 clock cycles (code generated by the
XEMICS C-compiler, all numbers are Signed Integers on 16 bits).
5 Memory organisation
The CPU uses a Harvard architecture, so that memory is organised in two separated fields:
program memory and data memory. As both memory are separated, the central processing
unit can read/write data at the same time it loads an instruction. Peripherals and system control
registers are mapped on data memory space.
Program memory is made in one page. Data is made of several 256 bytes pages.
0h1FFF / 01hBFF
Program
memory
8k instructions MTP
or
6k instructions ROM
0h0000
22 bits wide
Figure 5.1:
Memory organization
CPU
Instruction CPU
pipeline registers
LCD
0h8000
0h047F
RAM
0h0100
1024 Bytes 0h00FF
0h0080
Peripherals
0h0010
LP RAM 0h0000
8 bits wide
5 XX/D0202-135

5 Page





XE88LC04 arduino
Preliminary Datasheet XE88LC04
Low Power Microcontroller
6.11 USRT
Name
Address
RegUsrtS1
h0048
RegUsrtS0
h0049
www.DataSheet4U.com
RegUsrtCtrl
h004A
RegUsrtCond1
h004B
RegUsrtCond2
h004C
RegUsrtBufferS1
h004D
RegUsrtEdgeS0
h004E
Reserved
h004F
Table 6.11:
6.12 UART
765
USRT control registers
43210
UsrtWaitS0
r, 0 global
UsrtS1
rw, 1 global
UsrtS0
rw, 1 global
UsrtEnWait-
Cond1
UsrtEnWaitS0
UsrtEnable
rw, 0 global rw, 0 global rw, 0 global
UsrtCond1
rc, 0 global
UsrtCond2
rc, 0 global
UsrtBufferS1
r
UsrtEdgeS0
r, 0 global
Name
Address
RegUartCtrl
h0050
RegUartCmd
h0051
RegUartTx
h0052
RegUartTxSta
h0053
RegUartRx
h0054
RegUartRxSta
h0055
Reserved
h0056
Reserved
h0057
Table 6.12:
76543210
UartEcho
rw, 0 global
SelXtal
rw, 0 global
UartTx(7)
rw, 0 global
UartRx(7)
r
UartEnRx UartEnTx
UartXRx
UartXTx
rw, 0 global rw, 0 global rw, 0 global rw, 0 global
UartWakeup UartRCSel(2) UartRCSel(1) UartRCSel(0)
rw, 0 global rw, 0 global rw, 0 global rw, 0 global
UartTx(6) UartTx(5) UartTx(4) UartTx(3)
rw, 0 global rw, 0 global rw, 0 global rw, 0 global
UartBR(2)
rw, 1 global
UartPM
rw, 0 global
UartTx(2)
rw, 0 global
UartRx(6)
r
UartRx(5)
r
UartRxSErr
r
UartRx(4)
r
UartRxPErr
r
UartRx(3)
r
UartRxFErr
r
UartRx(2)
r
UartRxOErr
c
UartBR(1)
rw, 0 global
UartPE
rw, 0 global
UartTx(1)
rw, 0 global
UartTxBusy
r, 0 global
UartRx(1)
r
UartRxBusy
r
UartBR(0)
rw, 1 global
UartWL
rw, 1 global
UartTx(0)
rw, 0 global
UartTxFull
r, 0 global
UartRx(0)
r
UartRxFull
r
UART control registers
11 XX/D0202-135

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