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PDF LH5324C00 Data sheet ( Hoja de datos )
| Número de pieza | LH5324C00 | |
| Descripción | CMOS 24M (1.5M x 16) MROM | |
| Fabricantes | Sharp Electrionic Components | |
| Logotipo |  |
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LH5324C00
CMOS 24M (1.5M × 16) MROM
FEATURES
• 1,572,864 × 16 bit organization
• Access time: 120 ns (MAX.)
• Supply current:
– Operating: 80 mA (MAX.)
– Standby: 100 µA (MAX.)
• TTL compatible I/O
• Three-state output
• Single +5 V Power supply
• Static operation
• When the address input at both A19 and
A20 is high level, outputs become high
impedance irrespective of CE or OE.
• Package:
42-pin, 600-mil DIP
• Others:
– Non programmable
– Not designed or rated as radiation
hardened
– CMOS process (P type silicon
substrate)
DESCRIPTION
The LH5324C00 is a 24M-bit mask-programmable
ROM organized as 1,572,864 × 16 bits. It is fabricated
using silicon-gate CMOS process technology.
PIN CONNECTIONS
42-PIN DIP
TOP VIEW
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42 A19
41 A8
40 A9
39 A10
38 A11
37 A12
36 A13
35 A14
34 A15
33 A16
32 A20
31 GND
30 D15
29 D7
28 D14
27 D6
26 D13
25 D5
24 D12
23 D4
22 VCC
Figure 1. Pin Connections
5324C00-1
1
1 page  
CMOS 24M (1.5M x 16) MROM
LH5324C00
tRC
A0 - A20
tAA
(NOTE)
CE
tACE
(NOTE)
tCHZ
OE
tOE
(NOTE)
tOHZ
tOH
D0 - D15
HI-Z
DATA VALID
NOTE: The output data becomes valid when the last
intervals, tAA, tACE, or tOE, have concluded.
HI-Z = High Impedance.
Figure 3. Byte Mode
HI-Z
5324C00-3
A0 - A18
A19, A20
CE
tCHZ
OE
D0 - D15
HI-Z
tOHZ
tAHZ
DATA VALID
NOTE: The output data becomes valid when the last
intervals, tAA, tACE, or tOE, have concluded.
HI-Z = High impedance.
Figure 4. Word Mode
HI-Z
5324C00-4
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet LH5324C00.PDF ] | |
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